| btn Project Status | |||
| Project File: | btn.xise | Parser Errors: | No Errors |
| Module Name: | btn | Implementation State: | Programming File Generated |
| Target Device: | xc6slx9-2tqg144 |
|
No Errors |
| Product Version: | ISE 14.1 |
|
No Warnings |
| Design Goal: | Balanced |
|
All Signals Completely Routed |
| Design Strategy: | Xilinx Default (unlocked) |
|
|
| Environment: | System Settings |
|
0 (Timing Report) |
| Device Utilization Summary | [-] | ||||
| Slice Logic Utilization | Used | Available | Utilization | Note(s) | |
| Number of Slice Registers | 0 | 11,440 | 0% | ||
| Number of Slice LUTs | 0 | 5,720 | 0% | ||
| Number of occupied Slices | 0 | 1,430 | 0% | ||
| Nummber of MUXCYs used | 0 | 2,860 | 0% | ||
| Number of LUT Flip Flop pairs used | 0 | ||||
| Number of bonded IOBs | 6 | 102 | 5% | ||
| Number of LOCed IOBs | 6 | 6 | 100% | ||
| Number of RAMB16BWERs | 0 | 32 | 0% | ||
| Number of RAMB8BWERs | 0 | 64 | 0% | ||
| Number of BUFIO2/BUFIO2_2CLKs | 0 | 32 | 0% | ||
| Number of BUFIO2FB/BUFIO2FB_2CLKs | 0 | 32 | 0% | ||
| Number of BUFG/BUFGMUXs | 0 | 16 | 0% | ||
| Number of DCM/DCM_CLKGENs | 0 | 4 | 0% | ||
| Number of ILOGIC2/ISERDES2s | 0 | 200 | 0% | ||
| Number of IODELAY2/IODRP2/IODRP2_MCBs | 0 | 200 | 0% | ||
| Number of OLOGIC2/OSERDES2s | 0 | 200 | 0% | ||
| Number of BSCANs | 0 | 4 | 0% | ||
| Number of BUFHs | 0 | 128 | 0% | ||
| Number of BUFPLLs | 0 | 8 | 0% | ||
| Number of BUFPLL_MCBs | 0 | 4 | 0% | ||
| Number of DSP48A1s | 0 | 16 | 0% | ||
| Number of ICAPs | 0 | 1 | 0% | ||
| Number of MCBs | 0 | 2 | 0% | ||
| Number of PCILOGICSEs | 0 | 2 | 0% | ||
| Number of PLL_ADVs | 0 | 2 | 0% | ||
| Number of PMVs | 0 | 1 | 0% | ||
| Number of STARTUPs | 0 | 1 | 0% | ||
| Number of SUSPEND_SYNCs | 0 | 1 | 0% | ||
| Average Fanout of Non-Clock Nets | 1.00 | ||||
| Performance Summary | [-] | |||
| Final Timing Score: | 0 (Setup: 0, Hold: 0) | Pinout Data: | Pinout Report | |
| Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
| Timing Constraints: | ||||
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Sat May 30 18:07:25 2015 | 0 | 0 | 0 | |
| Translation Report | Current | Sat May 30 18:07:31 2015 | 0 | 0 | 0 | |
| Map Report | Current | Sat May 30 18:07:39 2015 | 0 | 0 | 6 Infos (6 new) | |
| Place and Route Report | Current | Sat May 30 18:07:46 2015 | 0 | 0 | 2 Infos (2 new) | |
| Power Report | ||||||
| Post-PAR Static Timing Report | Current | Sat May 30 18:07:50 2015 | 0 | 0 | 4 Infos (4 new) | |
| Bitgen Report | Current | Sun May 31 09:41:24 2015 | 0 | 0 | 0 | |
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| WebTalk Report | Current | Sun May 31 09:41:25 2015 | |
| WebTalk Log File | Current | Sun May 31 09:41:33 2015 | |