Installing Xilinx Design Suite: open a terminal 'sudo su' cd /home/tom/xilinx14-7/Xilinx_ISE_DS_Lin_14.7_1015_1 bash xsetup ********************************* Launching Xilinx Design Suite: open terminal and 'sudo su' run as root navigate to cd /opt/Xilinx/14.7/ISE_DS and run: source settings32.sh then type: ise the application should launch ********************************* when done cd /lib/firmware/hm2/7i43-4/ cd /lib/firmware/hm2/7i90/ cp /home/tom/linuxcnc/mesa/7i90/configs/hostmot2/source/TopEPPSHostMot2.bit /lib/firmware/hm2/7i90/SVST2_4_7I47S_TLP_72.BIT cp /home/tom/linuxcnc/mesa/7i90/configs/hostmot2/source/TopEPPSHostMot2.bit /home/tom/linuxcnc/configs/Sherline/Bitfiles/7i90/SVST2_4_7I47S_TLP_72.BIT cp /home/tom/linuxcnc/mesa/7i43/CONFIGS/HOSTMOT2/EPPHM2/SOURCE/TopEPPHostMot2.bit /lib/firmware/hm2/7i43-4/SVST2_4_7I47SSS.BIT cp /home/tom/linuxcnc/mesa/5i25/configs/hostmot2/source/TopPCIHostMot2.bit /home/tom/cradek/5i25_dmmbob1x2d.bit cp /home/tom/linuxcnc/mesa/5i25/configs/hostmot2/source/TopPCIHostMot2.bit /home/tom/skunkworks/7i76skunktest.bit cp /home/tom/linuxcnc/mesa/5i25/configs/hostmot2/source/TopPCIHostMot2.bit /home/tom/micges/PIN_G540x2_34M.bit cd /home/tom/linuxcnc/configs/Sherline/Bitfiles/7i90 cd /home/tom/linuxcnc/configs/Sherline/Bitfiles/6i24 Spindle PWM: cp /home/tom/linuxcnc/mesa/7i90/configs/hostmot2/source/TopEPPSHostMot2.bit /home/tom/linuxcnc/configs/Sherline/Bitfiles/7i90/SVST2_4_7I47TLP_72.BIT Spindle PWM NEW: cp /home/tom/linuxcnc/mesa/7i90/configs/hostmot2/source/TopEPPSHostMot2.bit /home/tom/linuxcnc/configs/Sherline/Bitfiles/7i90/SVST2_4_7I47S_TLP_72.BIT 6i24 bitfile: cp /home/tom/linuxcnc/mesa/5i24/configs/hostmot2/source/TopPCIHostMot2.bit /home/tom/linuxcnc/configs/Sherline/Bitfiles/6i24/SVST2_4_7I47S_TLP_72.BIT Spindle STEP: cp /home/tom/linuxcnc/mesa/7i90/configs/hostmot2/source/TopEPPSHostMot2.bit /home/tom/linuxcnc/configs/Sherline/Bitfiles/7i90/SVST2_4_7I47TLS_72.BIT *********************************************************************************************** cd /home/tom/linuxcnc/mesa/mesaflash-master To print out the Pinfile: ./mesaflash --device 7i90 --epp --addr 0x378 --readhmid ./mesaflash --device 7i90 --epp --addr 0x378 --readhmid > /home/tom/bitfile.txt ./mesaflash --device 6i24 --readhmid ./mesaflash --device 6i24 --readhmid > /home/tom/bitfile.txt To Write a bitfile to the 7I90: sudo ./mesaflash --device 7i90 --epp --addr 0x378 --write bitfilename.bit sudo ./mesaflash --device 7i90 --epp --addr 0x378 --write /home/tom/linuxcnc/configs/Sherline/Bitfiles/7i90/SVST2_4_7I47S_TLP_72.BIT ./mesaflash --device 7i90 --epp --addr 0x378 --write /home/tom/linuxcnc/mesa/7i90/configs/hostmot2/7i90_epp_justio.bit To Write a bitfile to the 6I24: mesaflash --help gives brief instructions sudo ./mesaflash --device 7i90 --epp --addr 0x378 --readhmid sudo ./mesaflash --help *********************************************************************************************** FOR WEBPACK 9.2: cd /home/tom/Xilinx92i source settings.sh ise *********************************************************************************************** If you can load the hm2_epp project and you have solved the license issues I can guide you you need to add the vhd file to the library also, i'd like to be able to build just one at a time instead of the whole list of em you should have a library pane in the left middle of the navigator page there should be three tabs, design, libraries, and files yep so select libraries the libraries is open and click on work did that the list is open so now right click and select add source and add your new pin file ok now chose the design pane i got red x's on the file i think it's looking at my previous project where i added it in the wrong place what file? Oh it wont let you add it twice PIN_SVST2_4_7I47SS_48.vhd its probably OK i added it to the lib pane carry on ok so select the design pane back on the design pane red x on Implement Design yellow ! on Synthesize - XST the top level file should have a little green pawn shop symbol by it ok i think it is OK double click on that file TopEPPHostMot2 - Behavioral..... ? i did now scroll down in the file and clone one of the pinout lines (and comment out the currently selected one) --use work.PIN_SVUA4_8_48.all; like that? only use mine yes (all are commented out except the active one) ok i think i speldt it right your current spelling gives me doubt :-) use work.PIN_SVST2_4_7I47SS_48.all; ok save (control s) did should be good to go so try double clicking on implement design NOTE: also need to click on Generate Programming File to get a .bit file ok it's churning where does the output files go? i used the default install settings synthesize -xts failed but it's still going TopEPPHostMot2.stx is missing. warning because the synthesize failed ok most likely causes of synthesis failure is a typo/syntax error in the source there should be an error in the console log at the bottom (you may have to scroll up a bit) not due to the file being added previously in the wrong place? whats is the reported error? line 1124: Index value <1> is not in Range of array . OK so thats your fault :-) maybe one of those numbers is wrong in the structure i removed one of the pwms yes if you only have one pwmgen, its pins had better all be for pwmgen 0 changed the 01 to 00 still failed though error now? Xst:774 - "/home/tom/linuxcnc/mesa/7i43/CONFIGS/HOSTMOT2/EPPHM2/SOURCE/oneofndecode.vhd" line 80: Constant must have a value : 'dec'. with warnings above it about null array Hmm maybe a name error in the pin file try compiling a standard pin file with a standard pin file I should say i'll use the standard 7i47_48 one and i'll post my pin file OK but it synthesized OK no red X by it now but a yellow ! red X on implement design now so yes i think so you can sidestep that error by building a current pinfile that has sserial included i don't see any in the list in the file any with ss i can't see any SV SP and SI what is SVSSP4 ? for a 7i46 PIN_SVSS4_8_48 but anyway the error in you pin file is the tx and rx pins i copied em from another ss file Sorry they are OK, not sure where the pin file problem is there are sss files in the directory, i wonder why they're not in the source file There may actually be a bug where you cannot have a single sserial channel aww i could remove the pwm i think, i probably won't use it i wonder if it falls on the tx rx pins of the 7i47 though nope, both are TX TX2 TX3 i think IO 6 & 21 would work though those were moved to NullTag that would be Tx1 Rx1 i think i think that's ok and you have a spare sserial channel! now to compile it.. do you know where it puts the generated files? source directory time to call in the big boys: FATAL_ERROR:Xst:xstmacronode.c:109:1.35 - Invalid In Port Name : D from A, index==-1 For technical support on this issue, please visit http://www.xilinx.com/support. you have the instance number wrong to the added sserials s/to/for/ it should be 2 shouldn't it? in the top structure try refresh on your brouser in moduleID section the number orf sserials stays 01 in pin section the instance stays 00 oh even though you added another? each sserial module can have 8 channels so rx,ts 0,1 are both using sserial 00 gotcha FATAL_ERROR:Xst:xstmacronode.c:109:1.35 - Invalid In Port Name : D from A, index==-1 For technical support on this issue, please visit http://www.xilinx.com/support. instance is 01 and tx rx 1 & 0 are 00 instance must be 00 in the top structure? (the first 8 channel sserial module) yes, below but what about the top structure instance count? no thats the count or sserial modules, its 1 count of in the top... yes it's set to 01 in the bottom structure they're all 00 that should be right i'll post new vhd posted running again.. can you try the svss4_8 config and see if it completes just to rule out some version/option related problem PIN_SVSS4_8_48.vhd ? yes add it to the libs? its already there ok make sure you only have one pin file uncommented ok running now what about the enable pin on the sserial? you said 7i47 doesn't use it. does that matter? trying it here OK same error PIN_SVSS4_8_48 done except i don't know where it put the files in the source directory (named TopEPPHostmot2.bit) probably something subtle broken in the PIN file i sure don't see it Ill take a look later bbl np No its a genuine bug, I need to track it down sine the error message is not too illuminating so should i hold off on that card and get the other one? i don't _need_ either one but wanted to move the io off the bare port I wouldn't worry about getting it to compile its possible it must just be some corner condition (There are more than 100 PIN files and Ive never seen that error before) I will track it down Tom_itx: looks like an obscure Xilinx bug workaround is to set synthesis 'Optimization goal' to speed instead of area really really dig them buggy tools AFAICT 2 deep async read dprams are not synthesized correctly in optimize area mode so if sserial channels are <3 you need to optimize for speed (which is OK) PCW, where do i change those settings? if you right click on synthesize and select properties, it the top menu item found it runnign PCW, how did you come across that error / bug? google PCW, how do i find out what pins the encoder etc functions are mapped to on the 7i84? PCW, i get a 212490 byte TopEPPHostMot2.bit file does it generate an xml or is that even needed? No xml (pncconf is the only thing that uses the xml file) looks like there's a bit involved in setting up the sserial only thing needed is to set the remote mode (if you use the encoder inputs) i don't need to worry about the software mode? reading about the mpg's software mode 3 yes you need to set one that has encoders if you want them i need one for the mpg since i'll be moving that over to this card eventually the rest is gpio thats a token in tje config string in the ini file is hostmot2 in the integrators manual? man hostmot2 i did that i was gonna print the sserial part in winders sserial_port_0=3x most of it is directed toward the 5i25 :) sserial_port_0=3x note the x to disable the second port so its not probled if it were used would it be sserial_port_0=33? if you wanted the mode on the second port to be 3 right normally if not used you want it disabled or the TXpin will rattle around at startup which might be a bad thing yeah if x-ed its usable as GPIO oh (like all other FPGA pins) i was gonna ask if it was just along for the ride since it was part of the sserial 00 no, all hostmot2 configs allow any pin to be GPIO the driver is not quite so flexible since modules are enabled by selecting the number of modules you want enabled is that andy's handiwork? is there a pdf somewhere for the hostmot2 man? ********************************* when done cd /lib/firmware/hm2/7i43-4/ cp /home/tom/linuxcnc/mesa/7i43/CONFIGS/HOSTMOT2/EPPHM2/SOURCE/TopEPPHostMot2.bit /lib/firmware/hm2/7i43-4/SVST2_4_7I47SSS.BIT