Xmega Application Note


sw_usart.h

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00001 /* This file has been prepared for Doxygen automatic documentation generation.*/
00055 #ifndef _SW_USART_MODULE_H_
00056 #define _SW_USART_MODULE_H_
00057 
00058 #include "config.h"
00059 
00060 /****************************** DEFINES ***************************************/
00061 
00064 typedef enum TIMER_PRESCALER_enum {
00065         TIMER_PRESCALER_OFF_gc         = (0x00), 
00066         TIMER_PRESCALER_1_gc           = (0x01), 
00067         TIMER_PRESCALER_8_gc           = (0x02), 
00068         TIMER_PRESCALER_64_gc          = (0x03), 
00069         TIMER_PRESCALER_256_gc         = (0x04), 
00070         TIMER_PRESCALER_1024_gc        = (0x05), 
00071         TIMER_PRESCALER_EXT_FALLING_gc = (0x06), 
00072         TIMER_PRESCALER_EXT_RISING_gc  = (0x07), 
00073 } TIMER_PRESCALER_t;
00074 
00075 
00078 typedef enum
00079 {
00080     IDLE,                 
00081     TRANSMIT,             
00082     TRANSMIT_STOP_BIT,    
00083     RECEIVE,              
00084     DATA_PENDING          
00085 }AsynchronousStates_t;
00086 
00087 #define SW_USART_BUFFER_SIZE 32  
00088 #define SW_USART_BAUD 9600       
00091 #define SW_USART_TICKS2WAITONE (uint8_t) ((1000000 / SW_USART_BAUD) - 1)
00092 
00094 #define INTERRUPT_EXEC_CYCL    (0xFF - 10)
00095 
00096 /* Some IO, timer and interrupt specific defines. */
00097 
00098 #define SW_USART_RX_CTRL        TCCR0A             
00099 #define SW_USART_RX_PRESCALE    TCCR0B             
00100 #define SW_USART_RX_COMPARE     OCR0A              
00101 #define SW_USART_RX_TIMER       TCNT0              
00102 #define SW_USART_EXT_IFR        EIFR               
00103 #define SW_USART_EXT_ICR        EICRA              
00104 #define SW_USART_RX_COMP_VECT   TIMER0_COMPA_vect  
00106 #define SW_USART_TX_CTRL        TCCR2A             
00107 #define SW_USART_TX_PRESCALE    TCCR2B             
00108 #define SW_USART_TX_COMPARE     OCR2A              
00109 #define SW_USART_TX_TIMER       TCNT2              
00110 #define SW_USART_TX_COMP_VECT   TIMER2_COMPA_vect  
00112 #define SW_USART_TX_PIN    PD1                     
00113 #define SW_USART_RX_PIN    PD0                     
00114 #define SW_USART_TRX_DDR   DDRD                    
00115 #define SW_USART_TRX_PORT  PORTD                   
00116 #define SW_USART_TRX_PIN   PIND                    
00119 /* Select prescaler so the timer runs at 1MHz. */
00120 #ifdef FOSC
00121 #       if (FOSC == 8000)
00122 #               define SW_USART_PRESCALER TIMER_PRESCALER_8_gc
00123 #       elif (FOSC == 1000)
00124 #               define SW_USART_PRESCALER TIMER_PRESCALER_1_gc
00125 #       else
00126 #               error FOSC must be 1000 or 8000.
00127 #       endif
00128 #else
00129 #       error FOSC must be defined.
00130 #endif /* FOSC */
00131 
00132 /****************************** MACROS ****************************************/
00133 
00134 #define SW_USART_RX_ENABLE_TIMER_INTERRUPT()       ( TIMSK0 |= ( 1<< OCIE0A ) )
00135 #define SW_USART_RX_DISABLE_TIMER_INTERRUPT()      ( TIMSK0 &= ~( 1<< OCIE0A ) )
00136 #define SW_USART_RX_CLEAR_TIMER_INTERRUPT()        ( TIFR0 |= ((1 << OCF0A) ) )
00137 #define SW_USART_RX_ENABLE_EXTERNAL0_INTERRUPT()   ( EIMSK |= ( 1<< INT0 ) )
00138 #define SW_USART_RX_DISABLE_EXTERNAL0_INTERRUPT()  ( EIMSK &= ~( 1<< INT0 ) )
00139 #define SW_USART_RX_ENABLE_PRESCALER()             ( SW_USART_RX_PRESCALE = SW_USART_PRESCALER )
00140 #define SW_USART_RX_DISABLE_PRESCALER()            ( SW_USART_RX_PRESCALE = 0x00)
00141 
00142 #define SW_USART_TX_ENABLE_TIMER_INTERRUPT()       ( TIMSK2 |= ( 1<< OCIE2A ) )
00143 #define SW_USART_TX_DISABLE_TIMER_INTERRUPT()      ( TIMSK2 &= ~( 1<< OCIE2A ) )
00144 #define SW_USART_TX_CLEAR_TIMER_INTERRUPT()        ( TIFR2 |= ((1 << OCF2A) ) )
00145 #define SW_USART_TX_ENABLE_PRESCALER()             ( SW_USART_TX_PRESCALE = SW_USART_PRESCALER )
00146 #define SW_USART_TX_DISABLE_PRESCALER()            ( SW_USART_TX_PRESCALE = 0x00)
00147 
00148 
00149 #define SW_USART_SET_TX_PIN()  ( SW_USART_TRX_PORT |= ( 1 << SW_USART_TX_PIN ) )
00150 #define SW_USART_CLR_TX_PIN()  ( SW_USART_TRX_PORT &= ~( 1 << SW_USART_TX_PIN ) )
00151 #define SW_USART_GET_RX_PIN()  ( SW_USART_TRX_PIN & ( 1 << SW_USART_RX_PIN ) )
00152 
00153 
00154 /************************* VARIABLES (LOCAL) **********************************/
00155 
00156 static volatile AsynchronousStates_t SwUsartRXState;     
00157 static volatile AsynchronousStates_t SwUsartTXState;     
00158 static volatile uint8_t SwUartTXData;                    
00159 static volatile uint8_t SwUartTXBitCount;                
00160 static volatile uint8_t SwUartRXData;                    
00161 static volatile uint8_t SwUartRXBitCount;                
00162 static volatile uint8_t SwUartTICKS2WAITONE = SW_USART_TICKS2WAITONE;
00163 
00164 static volatile uint8_t SW_USART_RX_Buffer[SW_USART_BUFFER_SIZE];
00165 static volatile uint8_t SW_USART_RX_Head = 0;
00166 static volatile uint8_t SW_USART_RX_Tail = 0;
00167 static volatile uint8_t SW_USART_RX_Num = 0;
00168 
00169 
00170 /************************* PROTOTYPES (GLOBAL) ********************************/
00171 
00172 void SW_USART_PutChar( const uint8_t c );
00173 void SW_USART_RX_Buffer_PutByte(uint8_t);
00174 void SW_USART_init( void );
00175 void SW_USART_Set_Baudrate(uint32_t);
00176 uint8_t SW_USART_RX_Buffer_GetByte(void);
00177 uint8_t SW_USART_Tx_Ready(void);
00178 uint8_t SW_USART_Test_Hit(void);
00179 
00180 #endif /* _SW_USART_MODULE_H_ */
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