#garfield Logs

Apr 21 2022

01:26 AM rue_bed: hey I added equ to the assmebler and its not even 11pm!
01:35 AM rue_bed: it cant do math tho
01:35 AM rue_bed: geez, this just goes on and on doesnt it?
07:07 PM rue_mohr: Tom_L, about 7 or 8cm is probably a good max, as there is plastic volume and cooling and stuff to deal with
07:10 PM Tom_L: may not have cutters small enough for the antlers
07:14 PM rue_mohr: hmm
07:14 PM rue_mohr: V?
07:15 PM Tom_L: funny lookin antlers
07:16 PM Tom_L: i have some smaller 4 flute but they generally don't work so good on aluminum
09:34 PM Tom_L: ~8.6cm
09:36 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/rue/reindeer/reindeer2.jpg
09:46 PM rue_mohr: that should be ok
09:47 PM rue_mohr: I wonder if I could embed a flashing led...
09:47 PM rue_mohr: definitly make it more than 3mm thick!
09:49 PM Tom_L: .250"?
09:50 PM Tom_L: .3125"?
09:50 PM Tom_L: (5/16)
10:02 PM rue_mohr: there is the ruler..
10:03 PM rue_mohr: 5/16 is ok
10:13 PM rue_mohr: ok, I'm recovered from work
10:23 PM Tom_L: had to add a couple ball mills to the tool table
10:23 PM Tom_L: i hardly ever use them
10:23 PM rue_mohr: :)
10:23 PM rue_mohr: the library grows with the diversity of the projects
10:24 PM Tom_L: 45 tools
10:24 PM rue_mohr: cool
10:24 PM rue_mohr: that would require one hell of a changer
10:24 PM Tom_L: not all used at once
10:25 PM rue_mohr: THATs the next challenge
10:25 PM Tom_L: my bud had a 119 tool changer on one
10:25 PM rue_mohr: wow
10:25 PM rue_mohr: thunder?
10:25 PM Tom_L: belt driven in the back of the machine
10:25 PM Tom_L: would prefetch prior to a tool change
10:32 PM rue_mohr: thunder!
10:32 PM rue_mohr: thunder and lightning verry verry frightening!
10:32 PM Tom_L: i like a good thunderstorm
10:32 PM aandrew: heh
10:32 PM Tom_L: makes you feel alive
10:32 PM rue_mohr: prolly gonna rain like hell in a min
10:33 PM aandrew: I was thinking "nah nah nah nah nah nahhh nahh THUN DER nah nah nah nah nah nahhh nahh" with that riff over and over and over and over throughout the enitre song
10:34 PM rue_mohr: heh
10:35 PM aandrew: not a bad song to be earwormed with
10:41 PM rue_mohr: working on adding the alu to the 1 bit
10:42 PM rue_mohr: aandrew, hey, have you worked with quartus?
11:04 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/rue/reindeer/reindeer4.jpg
11:04 PM Tom_L: i'll cut them separate
11:05 PM rue_mohr: do you think you can add a pin to leave in indent for an eye?
11:05 PM Tom_L: i can create an island
11:05 PM rue_mohr: not quite sure where it should go tho
11:05 PM Tom_L: in the head?
11:06 PM rue_mohr: yea
11:06 PM rue_mohr: that sounds good lol
11:08 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/rue/reindeer/reindeer5.jpg
11:09 PM rue_mohr: hmm
11:09 PM rue_mohr: ... it seems out,
11:09 PM rue_mohr: back more I think
11:10 PM rue_mohr: https://st.depositphotos.com/1905483/1830/i/950/depositphotos_18308307-stock-photo-tundra-raindeer-rangifer-tarandus-canada.jpg
11:10 PM rue_mohr: ....
11:10 PM rue_mohr: I'm not sure
11:11 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/rue/reindeer/reindeer6.jpg
11:11 PM rue_mohr: back (left) I think
11:11 PM rue_mohr: that seems better
11:11 PM rue_mohr: up?
11:11 PM Tom_L: grid won't let me
11:12 PM rue_mohr: I cant really tell just a sec
11:12 PM Tom_L: well i could manually move Y
11:12 PM rue_mohr: I'm gonna overlay the two
11:13 PM Tom_L: i gotta be able to get the cutte around it too
11:13 PM Tom_L: cutter
11:16 PM rue_mohr: ok let me post you this
11:18 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/d.jpg
11:18 PM rue_mohr: so its really close..
11:18 PM rue_mohr: can you see which way to go?
11:19 PM rue_mohr: dont know if it'll look right :)
11:20 PM rue_mohr: at the same time, if I change the scale a bit, it says your basically right on
11:21 PM aandrew: rue_mohr: yes
11:22 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/d.jpg
11:22 PM rue_mohr: there is scaled a bit different
11:22 PM rue_mohr: it seems to imply it should be a bit higher
11:23 PM rue_mohr: funny how well that fits tho
11:23 PM rue_mohr: aandrew, which yes is that for?
11:25 PM aandrew: heh
11:25 PM aandrew: that's a yes to I've used quartus before
11:25 PM rue_mohr: oh!
11:25 PM rue_mohr: where you do assign the signals to pins!?
11:25 PM rue_mohr: do you know what file it ends up in?
11:26 PM aandrew: also: what are you doing to that poor elk?
11:26 PM aandrew: reindeer?
11:26 PM rue_mohr: cncing it
11:26 PM aandrew: rue_mohr: yes, the pins are usually in the project file
11:26 PM rue_mohr: the idea is to play with plastic injection molding
11:26 PM rue_mohr: oh no,
11:26 PM rue_mohr: its not a pin definition file?
11:28 PM aandrew: sorry not .qpf, the settings file, .qsf
11:28 PM aandrew: you'll see a lot of stuff like this
11:28 PM aandrew: set_location_assignment PIN_F1 -to SDR_BA1
11:28 PM aandrew: set_location_assignment PIN_A7 -to UART_TXD
11:28 PM aandrew: set_location_assignment PIN_A6 -to UART_RXD
11:28 PM Tom_L: if his head were back with the antlers the eye would be right
11:28 PM rue_mohr: :)
11:29 PM aandrew: and then similar for the type of IO:
11:29 PM aandrew: set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to GPHY_MDIO
11:29 PM aandrew: set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to GPHY_IO0
11:29 PM aandrew: set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to GPHY_IO1
11:29 PM rue_mohr: aandrew, I dont have a complete project to try to work with
11:30 PM rue_mohr: ls /files/programming/fpga/altera/test1/
11:30 PM rue_mohr: db main.v main.v.bak output_files test1.qpf test1.qsf
11:30 PM Tom_L: just mapping pins to functions or signals
11:30 PM aandrew: look at test1.qsf
11:31 PM rue_mohr: set_global_assignment -name FAMILY "Cyclone II"
11:31 PM rue_mohr: set_global_assignment -name DEVICE EP2C5F256C8
11:31 PM rue_mohr: set_global_assignment -name TOP_LEVEL_ENTITY test1
11:31 PM rue_mohr: set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
11:31 PM rue_mohr: set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:59:53 APRIL 20, 2022"
11:31 PM rue_mohr: set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
11:31 PM rue_mohr: set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
11:31 PM rue_mohr: set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
11:31 PM rue_mohr: set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
11:31 PM rue_mohr: set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
11:31 PM rue_mohr: set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
11:31 PM rue_mohr: set_global_assignment -name VERILOG_FILE main.v
11:31 PM rue_mohr: set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
11:31 PM rue_mohr: set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
11:31 PM rue_mohr: set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
11:31 PM rue_mohr: set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
11:31 PM aandrew: perhaps the pin planner hasn't been run yet
11:32 PM aandrew: that's where you assign pins to signal names and logic levels
11:32 PM rue_mohr: it crashes
11:32 PM aandrew: in that case try creating an empty project, select the chip and run the pin planner
11:33 PM rue_mohr: it was
11:33 PM rue_mohr: it crashes
11:33 PM Tom_L: tell it to stop that
11:33 PM rue_mohr: I did
11:33 PM Tom_L: say it louder
11:34 PM rue_mohr: a few people from the graveyard already commented for me to keep it down
11:34 PM rue_mohr: tis ok
11:34 PM rue_mohr: I dont need a pin planner
11:34 PM rue_mohr: those clips from aandrew will do great
11:34 PM rue_mohr: it looks like there are resouces that revolve around not using the IDE
11:35 PM aandrew: well one moment
11:35 PM aandrew: let me send you the .qsf for a project I did
11:35 PM rue_mohr: there is a thing called EDALIZE that can supposedly make makefiles
11:35 PM aandrew: there's more in there and anything in there you're curioius about you can google for the string or ask me
11:35 PM rue_mohr: aandrew, if you have one for a pin count on something thats nice
11:36 PM rue_mohr: oh ...
11:36 PM aandrew: http://mixdown.ca/dump/top.qsf
11:36 PM rue_mohr: no ok, when i tried to compile, there was an extreme lack of errors
11:37 PM aandrew: you say that like it's a bad thing
11:37 PM rue_mohr: geez
11:37 PM rue_mohr: aandrew, well, if I'd assigned pins to the signals I used, I would have been ok with that
11:38 PM rue_mohr: if I say to a chip like that "toggle the LED pin" I dont expect it to just say "yup, ok!"
11:38 PM rue_mohr: without knowing which pin the led is on
11:38 PM Tom_L: i would
11:39 PM Tom_itx: P44,LED<0>,IOB,IO_L62P_D5_2,OUTPUT,LVCMOS33,2,12,SLOW,,,,LOCATED,NO,NONE,
11:39 PM Tom_itx: P45,LED<1>,IOB,IO_L49N_D4_2,OUTPUT,LVCMOS33,2,12,SLOW,,,,LOCATED,NO,NONE,
11:39 PM Tom_itx: P46,LED<2>,IOB,IO_L49P_D3_2,OUTPUT,LVCMOS33,2,12,SLOW,,,,LOCATED,NO,NONE,
11:39 PM Tom_itx: P47,LED<3>,IOB,IO_L48N_RDWR_B_VREF_2,OUTPUT,LVCMOS33,2,12,SLOW,,,,LOCATED,NO,NONE,
11:39 PM Tom_L: there's part of one from xilinx
11:39 PM rue_mohr: yup
11:39 PM rue_mohr: seems to be custom for the different fpga programs
11:39 PM Tom_L: the descriptors may be a little different
11:39 PM rue_mohr: I think altera is using TCL for just about everything
11:40 PM rue_mohr: their files kinda just set heaps and heaps of variables
11:40 PM Tom_L: eyes say it's bedtime
11:40 PM Tom_L: later
11:42 PM rue_mohr: gnight
11:43 PM rue_mohr: aandrew, yea I tried to install it on windows, but windows couldn't open the tar
11:43 PM rue_mohr: hahaha
11:43 PM rue_mohr: I also need to work out the order to call the compile tools
11:43 PM rue_mohr: its a big heap of stuff that I'm working on