#garfield Logs
Aug 14 2021
#garfield Calendar
04:08 AM Tom_L: long nap
09:40 AM rue_bed2: so apparently its morning
09:52 AM Tom_L: yeah, must be.. the sky is on fire
10:14 AM rue_mohr: huh
10:15 AM rue_mohr: k, not sure what I'm working on then
10:27 AM rue_mohr: if I'm gonna get the anchor holes somewhat aligned, I suppose I should center them on the bearing hole
10:28 AM rue_mohr: so I had two BGA CPLD on my desk
10:28 AM rue_mohr: and one of them is missing
10:28 AM rue_mohr: oh, its in the magnifier, ok
10:29 AM rue_mohr: darn me for not putting things away
10:29 AM rue_mohr: only 150RPM, but that pillow block spun with no issues
10:30 AM rue_mohr: see if I can hit the hole in the next one a bit better
11:33 AM Tom_L: mowed, trees trimmed, showertime
11:34 AM Tom_L: thing is, you can always melt and redo
11:34 AM Tom_L: err no, you sent me the mold... silly you
11:39 AM rue_mohr: its ok, there is a better mold I didn't print yet
11:39 AM rue_mohr: :)
11:40 AM rue_mohr: I'm massaging the pcb
11:40 AM rue_mohr: found a better place for a cap given the ground flood plane
11:40 AM rue_mohr: need to play a LOT with silk screen
11:52 AM rue_mohr: still think I should put a 555 circuit set under the crystal footprint
11:53 AM rue_mohr: I will reduce to making a 555 board with a crystal footprint if Ifeel I need it later
11:56 AM rue_mohr: I wonder how hard it will be to attach the bga
11:57 AM rue_mohr: I suppose I should try mounting a scrap one to an old pcb
11:58 AM Tom_L: in eagle, i would explode the silkscreen layers so i could move the text etc around beyond what the lib parts had
12:00 PM rue_mohr: dont have to in kicad
12:00 PM rue_mohr: it lets you move the silkscreens around as you want
12:00 PM rue_mohr: but for the connectors, I need to remove them, their useless
12:00 PM rue_mohr: and I'm gonna add the labels for each pin the connectors are to
12:02 PM rue_mohr: I'm using the jtag connector to protect the crystal from the regulator heat
12:02 PM rue_mohr: I'm using a 2x3 pin header as heatsink fins for the regulator
12:03 PM Tom_L: shouldn't be that close to anything linear
12:03 PM rue_mohr: and I have a trace cutting the ground plane to isolate the BGA from the regulator heat
12:03 PM rue_mohr: which who?
12:03 PM Tom_L: the xtal
12:03 PM rue_mohr: yea, its a module
12:03 PM rue_mohr: one of the 14 pin sized ones
12:04 PM rue_mohr: its a SMT regulator
12:04 PM Tom_L: i got a whole bunch of those oscillators for the programmers
12:04 PM Tom_L: tiny self contained bugger
12:04 PM Tom_L: 3 pn
12:04 PM rue_mohr: ;)
12:04 PM rue_mohr: I was looking at those
12:04 PM Tom_L: 16? mhz?
12:04 PM Tom_L: i forget
12:05 PM rue_mohr: I'm using a socketed crystal module so it can be changed out
12:05 PM rue_mohr: for different speeds
12:06 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/Untitled.png
12:06 PM rue_mohr: updated
12:06 PM Tom_L: CSTCE16M0V53-R0
12:06 PM Tom_L: 16Mhz 5%
12:06 PM rue_mohr: this is kinda an experimenter board
12:07 PM rue_mohr: came out too fat for a breadboard tho :/
12:07 PM rue_mohr: kicad doens't let you drag large areas like eagle
12:07 PM rue_mohr: so making this that little bit narrower that I can, would be a nighmare
12:08 PM Tom_L: you can do it
12:08 PM Tom_L: been there done that...
12:08 PM Tom_L: you start measuring each trace gap
12:08 PM rue_mohr: I couldn't get it tight enough for a breaboard anyhow
12:09 PM rue_mohr: I'm not worried about it tho, none of this type of board ever seem to fit
12:09 PM rue_mohr: I need to make sure the pin headers are in the right places tho
12:09 PM rue_mohr: just like eagle, its hard to keep them on-grid
12:09 PM Tom_L: yeah don't make an arduino boo boo
12:09 PM rue_mohr: yea, we all want to avoid that
12:10 PM rue_mohr: :)
12:12 PM rue_mohr: I like that a part and a parts foot print are seperate in kicad
12:14 PM rue_mohr: oo yea
12:14 PM rue_mohr: the spacing between the upper and lower strips is wrong
12:14 PM rue_mohr: well, I can make the board about 25 thou narrower in the process of correcting this...
12:15 PM aandrew: ooh lookit that
12:15 PM rue_mohr: complex eh?
12:15 PM aandrew: the green trace under the (guessing) regulator is giving me some trouble
12:16 PM rue_mohr: oh I should check the underside of the regulator eh?
12:16 PM aandrew: and the red one on the far left
12:16 PM rue_mohr: why that?
12:16 PM aandrew: non-45 is just a thing for me, it's not a you problem, it's a me issue
12:17 PM rue_mohr: oh yes
12:17 PM rue_mohr: I been using the 'drag' tool to correct general traces
12:17 PM rue_mohr: as its not doing a 45 degree snap thing for me
12:17 PM aandrew: what is the northward "tail" on the green trace just to the right of center?
12:17 PM rue_mohr: I was gonna bump all the traces to 0.5mm, but it does't lok right
12:18 PM rue_mohr: thermal block of the ground plane for the BGA
12:18 PM aandrew: thermal block?
12:19 PM rue_mohr: keep the thermal cycles from the linear away from the bga balls on that edge a bit
12:19 PM rue_mohr: all that flood plane is linear heatsink
12:19 PM aandrew: interesting. I wouldn'tve thought that'd do anything
12:19 PM rue_mohr: and the 2x3 header is heatsink fins
12:20 PM aandrew: I can't see the flood pattern on the green side
12:20 PM rue_mohr: look for the light edge-hatched
12:20 PM rue_mohr: its the entire bottom layer
12:20 PM aandrew: I can see the fringing on the outside area but I can't see the shape around the inside
12:20 PM rue_mohr: yea
12:20 PM rue_mohr: doesn't show
12:20 PM aandrew: I can see the large rectangle
12:21 PM rue_mohr: I can post some better images, just redoing the whole top half to align the pin headers
12:22 PM aandrew: oh don't do it on my account, I'm just cheerleading
12:22 PM aandrew: I'll post pics of the pleated skirt and pom poms later
12:22 PM rue_mohr: no, Im interested in the feedback
12:22 PM rue_mohr: nobody else knows pcb design enough to comment for me
12:23 PM Tom_L: yeah don't do it for him.. do it for me :)
12:23 PM rue_mohr: hah
12:23 PM aandrew: which, the outfit or the layout? :-)
12:24 PM Tom_L: oh... don't forget all those S traces so they are all the same length too
12:24 PM rue_mohr: hah
12:24 PM Tom_L: aandrew, yes
12:24 PM rue_mohr: I'm not doing High freq balancing on this
12:24 PM aandrew: Tom_L: hahaha
12:24 PM Tom_L: pads would do that for you but i didn't like it that much
12:27 PM rue_mohr: I suppose making sure the headers were in the right place at the start of the design would have been a good idea...
12:29 PM Tom_L: yeah and if they have housings make sure those have clearance too
12:29 PM Tom_L: like my programmer plugs
12:30 PM aandrew: that's one of the nice things with all the 3D integration packages have these days. it's additional work but does catch some of the stupids
12:30 PM aandrew: of course it requires accurate models.
12:32 PM rue_mohr: sadly it has no part models for this board
12:41 PM aandrew: I think 90% of my google searches these days are "sot23-5 step model" or "goofy idiotic connector step model" or "specific part 3d model" :-)
12:42 PM rue_mohr: heh
12:43 PM rue_mohr: at work we were running surface raceway for some networking
12:43 PM rue_mohr: all done, but needed some corners
12:43 PM rue_mohr: when I tried to get them, I was told they were obsolete
12:43 PM rue_mohr: !!?!?!
12:43 PM rue_mohr: with no replacement
12:43 PM rue_mohr: I phoned panduit, they confirmed, obsolete with no replacement
12:44 PM rue_mohr: told them to send me a 3d model so I could print some
12:44 PM rue_mohr: the called back and found the replacement part number
12:44 PM rue_mohr: like wtf!?!?
12:44 PM rue_mohr: it took 3 months to get them in
12:56 PM aandrew: wtf?
12:56 PM aandrew: "we'll sell you the straight pieces, but you can't do anything with them"
12:56 PM rue_mohr: I know eh?
12:56 PM aandrew: what's the part number, I bet someone's already got 3d models
12:56 PM aandrew: I'm fighting the urge to buy an SLA printer and wash/cure machine
12:56 PM aandrew: I know I have zero time and no place to put it
12:57 PM rue_mohr: they said a step might be available
12:57 PM rue_mohr: which makes sense,
12:57 PM rue_mohr: I'm sure all those overpriced architects like to model with them
12:58 PM rue_mohr: wow, just 20 thou tigher on the board and fitting traces is a challange
01:00 PM rue_mohr: magnetic snap is evil
01:01 PM rue_mohr: you need it to make things connect properly, but it oven pulls things into a grid of places they cant be in
01:01 PM rue_mohr: I dont like the whole "trace intersects, so I wont let you do it"
01:03 PM rue_mohr: oh I see what you mean about that left trace
01:03 PM rue_mohr: how did it get like that...
01:04 PM rue_mohr: whoa, kicad, wtf
01:08 PM rue_mohr: the magnetic distance should be based on the zoom...
01:08 PM rue_mohr: when should I start submitting patches?
01:13 PM rue_mohr: dont think there is much of anything I can do about the trace under the regulator
01:14 PM aandrew: you can't get rid of the "jaggie" by moving the left side up a bit?
01:15 PM rue_mohr: oh I think thats gone now
01:15 PM rue_mohr: yea
01:16 PM * Tom_L clicks refresh on his image
01:16 PM rue_mohr: I aligned the jtag to the 0.1" grid and that changed
01:17 PM rue_mohr: updated
01:18 PM rue_mohr: hah, and my browser gives me the cached ver
01:18 PM Tom_L: some of those look too close together
01:18 PM rue_mohr: heh
01:18 PM rue_mohr: its a high rez board!
01:18 PM rue_mohr: tho I could space..
01:19 PM Tom_L: upper right bga corner look pretty close
01:19 PM rue_mohr: yea the jtag adds a lot of squeezing
01:20 PM Tom_L: you got gobs of room
01:20 PM rue_mohr: I need to keep those jtag high so the flood plane for the linear heatsink is big
01:20 PM aandrew: ahh very nice
01:20 PM aandrew: although -- there is no controllable LED on there
01:20 PM aandrew: you *must* have a blinkenlight
01:20 PM rue_mohr: 3, on the left
01:20 PM aandrew: oh maybe you do
01:21 PM aandrew: good man
01:21 PM Tom_L: yeah we talked about that yesterday
01:21 PM aandrew: make sure one is blue and irritatingly bright
01:21 PM rue_mohr: hah
01:21 PM rue_mohr: and 3 buttons
01:21 PM aandrew: are you sure you can even drive LEDs with the FPGA directly?
01:21 PM rue_mohr: I have a spare pad with nothing on it :/
01:21 PM aandrew: some have very low drive capability
01:21 PM rue_mohr: yea
01:21 PM rue_mohr: white/blue for sure
01:21 PM Tom_L: so those led resistors should be on the bottom with a via to them and move the leds to the edge
01:22 PM rue_mohr: oh
01:22 PM rue_mohr: huh
01:22 PM Tom_L: which are the leds?
01:22 PM rue_mohr: DA11-DA13
01:22 PM rue_mohr: (pins A11 thru A13)
01:22 PM Tom_L: the big fat pads?
01:22 PM Tom_L: left edge
01:22 PM rue_mohr: "hand solder" class
01:23 PM rue_mohr: after all these years of doing 1 sided baords, I'm finding I have a problem thinking in 2 layer
01:24 PM aandrew: I'd have flipped the sides of R5 so the FPGA pin goes to the "top", then top of R6, bottom of R5, loop to the left over the switch (? SWA8), joins to bottom of R7 like you have it, then on to ground
01:24 PM rue_mohr: I also have trust issues with the manufacturing
01:24 PM rue_mohr: as far as vias go
01:24 PM aandrew: but this is just "art" stuff now
01:24 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/boards/atmega32u4/atmega32u4_1.jpg
01:24 PM rue_mohr: oh yea
01:24 PM Tom_L: traces all the same size and evenly spaced
01:24 PM rue_mohr: aandrew, and I need to put a lot of time into silkscreen
01:25 PM aandrew: you're not gonna try to etch this yourself?
01:25 PM aandrew: you could actually remove all the non-connected balls underneath
01:25 PM Tom_L: we don't need no dangling balls
01:26 PM aandrew: fuck
01:26 PM aandrew: now I got "do your boys hang low do they wobble to and fro" going thorugh my head
01:26 PM aandrew: thanks Tom_L
01:28 PM Tom_L: rue_mohr, 2 of those 3 jtag traces could go between the regulator with vias in that 12 acre field of board space beside it
01:28 PM Tom_L: that would free up some room for the rest of them
01:28 PM rue_mohr: oo wait I need the ground plane to circle the fpga
01:28 PM rue_mohr: hmm
01:29 PM * Tom_L realizes rue_mohr was thinking in single sided when he began this board
01:30 PM rue_mohr: yea
01:30 PM rue_mohr: I was almost gonna try and do it eh?
01:52 PM rue_mohr: hmm I wish kicad would drag parts with the traces
01:53 PM rue_mohr: oh, half as many vias if I ...
02:08 PM rue_mohr: hmm I should be casting and welding
02:09 PM rue_mohr: updated
02:09 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/Untitled.png
02:09 PM rue_mohr: just shuffling resistors tho
02:10 PM rue_mohr: I could slide the 3 pullups closer to the cpld
02:11 PM rue_mohr: I need to make sure I dont constrict the ground plane under there
02:18 PM rue_mohr: its too bad
02:18 PM rue_mohr: there are enough io for a full-on 7 segment
02:19 PM rue_mohr: Its hard to hold back the feature creep
02:19 PM rue_mohr: its just a breakout board
02:27 PM rue_mohr: its too bad really, the best place for that regulator would be right under the oscillator
02:47 PM rue_mohr: 12:30 24L removed from well...
02:57 PM aandrew: is that the accidental well?
02:57 PM rue_mohr: digging an underground shop? I have no idea what your talking about
02:59 PM aandrew: yeah you mentioned your underground shop was collecting water rapidly
03:00 PM rue_mohr: well, one way or anther A problem will get solved
03:00 PM rue_mohr: maybe its watering a lawn, maybe its where to put stuff, roll the dice
03:01 PM rue_mohr: 2 mins every 6 hours is WAY TOO MUCH WATER
03:01 PM rue_mohr: need to adjust the program
04:09 PM Tom_L: surely you could stack a 7seg over the fpga!!!
04:09 PM rue_mohr: oooh I should go shopping before everyone closes
04:09 PM rue_mohr: heh
04:09 PM Tom_L: it's only 2
04:09 PM rue_mohr: there is that space between the cpld and the buttons thats tempting
04:10 PM rue_mohr: I have some that would fit
04:10 PM rue_mohr: but no.
04:10 PM Tom_L: if it were in eagle i could probably find you enogh space to put 2 fpga on it :)
04:10 PM Tom_L: maybe not quite that drastic
04:10 PM rue_mohr: if I properly embraced all the layers there would be more space
04:10 PM Tom_L: never tried hidden vias
04:11 PM rue_mohr: I can see lots of things I could have done looking back
04:11 PM Tom_L: my eagle supports it though
04:11 PM rue_mohr: osh says no hidden vias
04:11 PM Tom_L: pfft
04:11 PM Tom_L: what kindof a board house is that!!
04:11 PM rue_mohr: as a small 2 layer board I think this will be really cheap
04:11 PM rue_mohr: those led baords were only 80c for the sum total of 3 + shipping
04:11 PM Tom_L: you're kinda gettin hooked on board making
04:12 PM rue_mohr: I'v just not finished this up
04:12 PM rue_mohr: the led baords were just to see if I could get osh to make 'em
04:12 PM rue_mohr: this bga is the full on test of things I cant make myself
04:12 PM rue_mohr: I only plan to use them for things I cant make
04:13 PM rue_mohr: did you see the lcd board I did .... a bit ago?
04:13 PM rue_mohr: last week?
04:13 PM rue_mohr: maybe the week ebfore
04:13 PM Tom_L: i dunno, i doubt it
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200515.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200518.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200519.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200522.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200523.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200524.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200566.jpg
04:15 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200568.jpg
04:15 PM Tom_L: oh i did see that one
04:15 PM rue_mohr: stupid thing had a 2mm pitch
04:15 PM rue_mohr: narf
04:16 PM rue_mohr: didn't even notice till I went to plug it into the breadboard
04:16 PM Tom_L: yeah i had some flat ribbon that was 2mm
04:16 PM rue_mohr: got it years ago to play with
04:17 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/old_misc_files/old_misc_index.php
04:17 PM Tom_L: halfway down
04:18 PM Tom_L: got probably 50-75 or more of those lcds
04:18 PM rue_mohr: ah yea
04:18 PM rue_mohr: did you etch all those?
04:18 PM Tom_L: sold most
04:18 PM Tom_L: no
04:18 PM rue_mohr: no, their thru plated
04:18 PM Tom_L: that was before eagle though
04:19 PM Tom_L: some board house that had their own software
04:19 PM rue_mohr: huh
04:19 PM Tom_L: kinda sucked
04:19 PM rue_mohr: hmm
04:19 PM rue_mohr: I have an old dos program I use
04:19 PM rue_mohr: there is no point to the schematic capture
04:19 PM rue_mohr: I just directly make the board
04:19 PM Tom_L: that post was for the lcd though
04:20 PM Tom_L: local place had em and i got several boxes full.. unopened
04:20 PM Tom_L: went back to get the rest and they realized what they did and said they had no more :)
04:20 PM Tom_L: i peddled em for $10 ea iirc
04:21 PM Tom_L: 128 x 128
04:21 PM rue_mohr: of lcdS?
04:21 PM Tom_L: yes
04:21 PM rue_mohr: nice
04:21 PM Tom_L: i dunno if i even kept one
04:22 PM rue_mohr: yer natural sales guy
04:22 PM rue_mohr: I could make a solid gold car and not be able to sell it for scrap
04:22 PM Tom_L: right place right time
04:23 PM Tom_L: they went mostly to the robotics groups i was a part of then
04:23 PM rue_mohr: must have been nice to have a group like that
04:26 PM Tom_L: not local
04:27 PM Tom_L: seattle & portland which is where laen is from (osh)
04:27 PM rue_mohr: still, you have to admit, latley irc is getting awefull quiet
04:27 PM rue_mohr: I'm watching a lot of channels, and its just dead
04:27 PM Tom_L: make some noise!
04:28 PM rue_mohr: tried it...
04:28 PM rue_mohr: I'm running 1728 followers on twitter, but it looks like only about 8 are alive
04:28 PM rue_mohr: ~33 on a good day
04:29 PM Tom_L: i'm not quite dead yet..
04:30 PM rue_mohr: :S
04:30 PM Tom_L: bday this week
04:30 PM rue_mohr: happy creation anniversary!
04:30 PM Tom_L: so i made it one more
04:30 PM Tom_L: that was the big number
04:31 PM rue_mohr: yea I need to do more multilayer boards, I only have two and the overlap of things is glitching me out
04:32 PM rue_mohr: and work out how to port myself to an electromechanical system
04:32 PM Tom_L: better hurry before it's outdated
04:33 PM rue_mohr: I have to hurry while the semis are still being made
04:33 PM rue_mohr: I'm having joint issues, minor ones, which is concerning me
04:34 PM Tom_L: they just get worse
04:34 PM rue_mohr: but one of them it related to hitting my left elbow on so many things is hypersensitive
04:35 PM rue_mohr: you know, it might be interesting to try designing a 12 layer board
04:35 PM Tom_L: my eagle will do 16
04:35 PM Tom_L: they get expensive though
04:35 PM rue_mohr: yea
04:36 PM rue_mohr: not neccissarily make it
04:36 PM rue_mohr: tho I think boards like that are just a lot of ground and vcc planes
04:36 PM Tom_L: what would be the point of that?
04:36 PM Tom_L: you'd never know if it worked
04:36 PM rue_mohr: break my hangups about trace crossings
04:36 PM rue_mohr: heh
04:37 PM Tom_L: not if they're a pc in a 3 x 3" footprint
04:37 PM rue_mohr: how many layers before a board is 0.2" thick? :)
04:38 PM rue_mohr: I need to get sodium free salt
04:38 PM rue_mohr: catfood
04:38 PM rue_mohr: milk
04:38 PM rue_mohr: human food, I suppose
04:38 PM rue_mohr: a black towel
04:39 PM Tom_L: seasalt?
04:39 PM Tom_L: i think
04:39 PM rue_mohr: no thats sodium
04:39 PM rue_mohr: its for degassing the alum
04:39 PM Tom_L: oh
04:40 PM Tom_L: epsom salt?
04:40 PM rue_mohr: dont think so
04:40 PM rue_mohr: its sold like table salt
04:40 PM Tom_L: magnesium sulphate
04:40 PM Tom_L: huh
04:41 PM Tom_L: Potassium Chloride, Potassium Bitartrate, Adipic Acid, Silicon Dioxide, Mineral Oil and Fumaric Acid
04:41 PM Tom_L: no clue
04:41 PM Tom_L: https://www.amazon.com/NoSalt-Sodium-Free-Salt-Alternative-Ounce/dp/B0183RU7VI
04:44 PM Tom_L: so you almost got me tempted enough to get my fpga board out again
04:51 PM rue_mohr: :)
04:51 PM rue_mohr: this is cpld tho :)
04:51 PM rue_mohr: lets wire up a bga, cmon
04:52 PM rue_mohr: its hard if there isn't a target tho eh?
04:52 PM Tom_L: i got a cpld too
04:52 PM Tom_L: tiny
04:53 PM rue_mohr: thats what makes it a challange
04:53 PM Tom_L: no, i've limited what i'm going to do here
04:53 PM Tom_L: and that's leaning toward mechanical
04:56 PM Tom_L: are those 4 dots under the bga thru holes?
04:56 PM Tom_L: appear to be
04:56 PM rue_mohr: yes
04:56 PM rue_mohr: there are 8
04:56 PM rue_mohr: er 6
04:56 PM Tom_L: 10
04:56 PM rue_mohr: 4 are the verry middle pad, its ground
04:56 PM rue_mohr: the next outter 2 are vcc
04:56 PM rue_mohr: there are 4 more at the outter corners which are also ground
04:56 PM Tom_L: what size hole?
04:56 PM rue_mohr: tiny
04:57 PM rue_mohr: 0.8mm ?
04:57 PM Tom_L: can they do that?
04:57 PM rue_mohr: no 0.3mm
04:57 PM rue_mohr: supposedly yes
04:57 PM Tom_L: k
04:57 PM rue_mohr: I hope the plating works ok at that size
04:57 PM Tom_L: you'll want to beep test those
04:57 PM rue_mohr: there are redundancies
04:58 PM Tom_L: it could be thin in the holes
04:58 PM rue_mohr: 500mA worst case
04:58 PM Tom_L: i'm sure they've mastered that by now
04:58 PM rue_mohr: :) its easy to assume not
04:59 PM rue_mohr: thats why I wanted to bump all the traces to 0.5mm, less etch failures
04:59 PM rue_mohr: I have two other vias under the cpld, but their for test points
04:59 PM Tom_L: i did .008 iirc on some
04:59 PM Tom_L: maybe .010
04:59 PM rue_mohr: one for clock, and one for a link between gclk3 and an adjacent io pin
05:00 PM rue_mohr: so yea, mine are ~10 thou
05:00 PM Tom_L: that's plenty good
05:00 PM rue_mohr: yup
05:00 PM Tom_L: i'd have to check mine
05:00 PM rue_mohr: the traces on the bottom of the cpld are impressive
05:00 PM rue_mohr: they fit two between 1mm pads
05:01 PM Tom_L: i updated the rpi yesterday out of boredom
05:02 PM rue_mohr: howd it go?
05:02 PM Tom_L: fine
05:02 PM Tom_L: set a static ip and removed / reinstalled lcnc
05:02 PM Tom_L: from a beta version to final
05:03 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/bot.png
05:03 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/top.png
05:03 PM rue_mohr: it does not show vias that are on pads of resistors
05:03 PM Tom_L: is that part of kicad?
05:03 PM rue_mohr: so about 6 vias look missing
05:03 PM rue_mohr: yea
05:03 PM rue_mohr: 3d viewer
05:03 PM Tom_L: i probably would have put them beside the pad
05:03 PM rue_mohr: its supposed to show parts
05:04 PM rue_mohr: I'll watch for it in the preview
05:05 PM Tom_L: what are swa7..9?
05:05 PM rue_mohr: switches
05:05 PM rue_mohr: connected to A7 A8 and A9 ;)
05:06 PM rue_mohr: I'll see if I can copy the labels to the bottom too
05:06 PM Tom_L: no 32768 xtal?
05:06 PM rue_mohr: heh, no
05:07 PM rue_mohr: just the big socketed module
05:07 PM Tom_L: i have some of those that are kinda tiny
05:07 PM Tom_L: i think you saw em
05:07 PM rue_mohr: yea
05:07 PM rue_mohr: I want to be able to change them out for different speeds
05:07 PM rue_mohr: cause its an experimenter board and all
05:07 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/misc_stuff/RTC1st.jpg
05:08 PM Tom_L: big gnd pad under it
05:08 PM rue_mohr: yep
05:08 PM rue_mohr: oh whats 10:30 plus 6 hours
05:08 PM Tom_L: 17:30
05:08 PM Tom_L: :)
05:08 PM Tom_L: no
05:09 PM Tom_L: 16:30
05:09 PM rue_mohr: 16:30 12... 4:30?
05:09 PM Tom_L: yup
05:09 PM rue_mohr: its about 3
05:09 PM Tom_L: it's about 5
05:09 PM rue_mohr: so about 1.5 hrs till I THINK the greenhouse pump goes off
05:09 PM rue_mohr: I know it working, but I cant tell WHEN
05:09 PM Tom_L: i need a pressure valve on my pump
05:10 PM Tom_L: so it will build to a certain pressure then open full
05:10 PM rue_mohr: ?
05:10 PM rue_mohr: the basement?
05:10 PM Tom_L: well
05:10 PM Tom_L: 1" pipe
05:10 PM Tom_L: out
05:14 PM rue_mohr: and I should dig up the potatoes
05:15 PM rue_mohr: before they start a second round
05:15 PM Tom_L: you don't want more?
05:15 PM rue_mohr: it doens't go well
05:16 PM rue_mohr: having them try to reboot the same year
05:16 PM Tom_L: i mounded them up when i had my garden
05:16 PM Tom_L: i could dig right in the side and grab em
05:16 PM rue_mohr: I'v not been able to get that to work
05:23 PM Tom_L: so you prefer verilog over vhdl?
05:23 PM rue_mohr: vdhl seems strange
05:23 PM rue_mohr: verilog is quite pascall-like
05:23 PM Tom_L: doesn't seem to matter to me
05:23 PM Tom_L: at least when i was doing it
05:24 PM Tom_L: i tried to do each test in both
05:24 PM aandrew: heh
05:25 PM aandrew: I prefer VHDL specifically because it is NOT like any programming language I use
05:25 PM Tom_L: just like with cad, i did all the prints in catia then went back and did them in solidworks
05:25 PM aandrew: Verilog is too close for me
05:25 PM aandrew: and at least for describing hardware I kind of like VHDL's pedantic nature
05:25 PM Tom_L: my mesa boards are vhdl
05:26 PM Tom_L: for the mill
05:26 PM aandrew: what are your mesa boards?
05:26 PM Tom_L: what do you mean?
05:26 PM Tom_L: spartan6
05:26 PM Tom_L: for motion control
05:26 PM aandrew: ah nice, you built 'em?
05:27 PM Tom_L: no mesa did (peter)
05:27 PM Tom_L: http://www.mesanet.com/
05:27 PM Tom_L: he gave me several for testing as well
05:28 PM aandrew: interesting
05:28 PM Tom_L: http://store.mesanet.com/index.php?route=product/product&product_id=291&search=7i90
05:28 PM Tom_L: that's the one i have on the mill
05:28 PM Tom_L: along with a daughter card
05:28 PM Tom_L: http://store.mesanet.com/index.php?route=product/product&product_id=62&search=7i80
05:29 PM Tom_L: same thing with ethernet instead of parport / spi
05:30 PM Tom_L: i have some that are pci pcie as well
05:31 PM rue_mohr: this is the thing about a pcb, you can stare at it forever and make adjustment
05:31 PM rue_mohr: s
05:33 PM Tom_L: and after you send it in, you see the ones you _should_ have made
05:33 PM rue_mohr: well
05:33 PM rue_mohr: this is too simple for outright errors
05:34 PM rue_mohr: and there is no specific goal for it
05:38 PM rue_mohr: power wink?
05:39 PM Tom_L: not here
05:39 PM rue_mohr: then I can assume its localized...
05:39 PM rue_mohr: :)
05:51 PM rue_shop3: I think the well is about half recovered
05:51 PM rue_shop3: say 12:30 to 3:30 ~12L
05:51 PM rue_shop3: about 4L/hr?
05:52 PM Tom_L: huh?
05:54 PM rue_mohr: the well
05:54 PM Tom_L: yours or mine?
05:54 PM rue_mohr: shopping, bbl
05:55 PM rue_shop3: I need to think on alignment for the bearings
05:57 PM Tom_L: got a tube?
07:43 PM Tom_L: i even forgot where the 'program' button was in impact!
07:45 PM Tom_L: ok that worked
07:45 PM Tom_L: and i sent it to the fpga, not the prom
07:51 PM rue_mohr: :)
07:51 PM rue_mohr: whats it do?
07:51 PM Tom_L: just the counter
07:51 PM rue_mohr: I got 48 bits on this board
07:52 PM Tom_L: but i changed it from 0-F to 0-9 to verify it worked
07:52 PM rue_mohr: plus the buttons and leds
07:52 PM rue_mohr: :)
07:52 PM Tom_L: dug out my encoder
07:52 PM rue_mohr: its a spartin 6?
07:52 PM Tom_L: yup
07:52 PM rue_mohr: P servo?
07:52 PM rue_mohr: you might have to dig out too much other stuff
07:52 PM rue_mohr: :)
07:54 PM rue_mohr: I wonder how many bits of pwm a person really needs
07:54 PM rue_mohr: this cpld board is for a 95288
07:54 PM rue_mohr: thats the most macrocells I'll have worked with yet
07:55 PM Tom_L: how many does the spartin6 have?
07:55 PM rue_mohr: I was kinda dissapointed when I realised I could only make a ~1000 bit shift register with the spartin 6
07:55 PM rue_mohr: lots more than 288
07:55 PM rue_mohr: if your in the software, one of the reports will tell yua
08:03 PM Tom_L: i forgot how to assign the prom to the target fpga
08:03 PM rue_mohr: I have to upload the fpga with a programmer first
08:04 PM Tom_L: i wrote down what each was because i knew i would need it later
08:04 PM Tom_L: . it's later
08:08 PM Tom_L: i dunno where the .mcs file is located
08:08 PM Tom_L: or how to create a new one
08:08 PM Tom_L: that defines the spi flash
08:08 PM rue_mohr: ... I dont use those...
08:08 PM rue_mohr: hmm
08:09 PM rue_mohr: is it under impact?
08:09 PM Tom_L: yes
08:09 PM Tom_L: i found it
08:10 PM Tom_L: i loaded the quad test into the fpga though not the spi flash
08:11 PM rue_mohr: ok...
08:11 PM rue_mohr: quadrature encoder!
08:11 PM rue_mohr: now proportionate servo
08:11 PM rue_mohr: pwm control
08:11 PM rue_mohr: ouput 4 signals, one for each H bridge fet
08:12 PM rue_mohr: put all the switching delays in the fpga :)
08:12 PM rue_mohr: I think I just finished the critical silkscreen work
08:13 PM rue_mohr: there is a funny way you have to change the cut lines
08:13 PM rue_mohr: and I dont recall how it goes
08:19 PM Tom_L: when you select the spi flash, what's the data width for?
08:19 PM Tom_L: options are 1 2 4
08:19 PM rue_mohr: ... probably channels?
08:19 PM rue_mohr: some spi have more than 1 channel ?
08:20 PM Tom_L: it must have 4 or it wouldn't show it
08:20 PM rue_mohr: 1 should always be safe
08:21 PM Tom_L: and slow
08:21 PM Tom_L: refresher course..
08:28 PM Tom_L: something is fishy
08:30 PM rue_mohr: ?
08:30 PM Tom_L: i changed the program and wrote to flash but it didn't change
08:30 PM rue_mohr: so, are you sure the file you grabbed was from the right project?
08:30 PM rue_mohr: ise doesn't seem good about paths
08:30 PM Tom_L: nope :)
08:31 PM rue_mohr: I had to keep pointing it to my project files
08:34 PM Tom_L: it's the same .bit file that goes to the fpga right?
08:34 PM Tom_L: no need to reformat it for flash?
08:34 PM rue_mohr: I thought it was a ....
08:34 PM rue_mohr: no jed is...
08:34 PM rue_mohr: bit file, I think so, yes
08:35 PM rue_mohr: bit is made by the jed..
08:35 PM rue_mohr: or the jed is how to write the bit
08:35 PM rue_mohr: hmm
08:35 PM Tom_L: W25Q32V flash
08:35 PM Tom_L: spi
08:36 PM rue_mohr: "
08:36 PM rue_mohr: flash write
08:36 PM rue_mohr: -----------
08:36 PM rue_mohr: xc3sprog -c ft232h xc6slx16_cs324.bit
08:36 PM rue_mohr: xc3sprog -c ft232h -I main.bit
08:36 PM rue_mohr: "
08:36 PM rue_mohr: bit file
08:39 PM Tom_L: fsck
08:39 PM rue_mohr: ?
08:39 PM Tom_L: still not the right program
08:39 PM rue_mohr: ok, well, delete the bit file
08:39 PM rue_mohr: and try to regenerate it
08:40 PM rue_mohr: make sure its gone first
08:40 PM rue_mohr: like I say, stupid impact kept pulling up the project folder for the first thing I'd ever done
08:40 PM rue_mohr: it got me a few times
08:40 PM Tom_L: ok i closed it all down and start from scratch
08:41 PM rue_mohr: wont change impacts mind
08:41 PM Tom_L: i know but at least i know where i'm at and i did del that .bit file
08:41 PM rue_mohr: if you leave impact open, it should complain that the programming files changed when you go to program after having recompiled
08:42 PM rue_mohr: after doing the command line programming, I decided impact is annoying
08:43 PM Tom_L: i was used to it, i just forgot alot of things
08:44 PM rue_mohr: hah, I think I was on hackaday and didn't even notice
08:44 PM rue_mohr: https://hackaday.com/2012/10/18/the-inner-workings-of-servo-motors/
08:47 PM Tom_L: link is broke to your article
08:50 PM Tom_L: i'm wondering if i have the right flash chip assigned
08:50 PM Tom_L: my note isn't real specific. it shows 2. one that the schematic has and possibly one that is on the board (same family but bigger)
08:50 PM rue_mohr: yes, dyndns
08:51 PM rue_mohr: 1 should be safe
08:51 PM Tom_L: i'll look at the chip in a sec and make sure which one it is
08:52 PM rue_mohr: cant help ya, my board and process are all different
08:52 PM aandrew: woo you're hackaday famous, although I'm sure this isn't your first time
08:52 PM Tom_L: i know
08:52 PM rue_mohr: its the first one I didn't know about!
08:52 PM aandrew: how's your site hold up
08:52 PM Tom_L: i just recalled that about the 2 chips
08:53 PM Tom_L: doing a blank check right now
08:53 PM rue_mohr: :) I'm gonna go strip down a hot water tank
08:53 PM aandrew: oh it's not working
08:53 PM aandrew: 404
08:54 PM aandrew: I'm happy to give you a login and space on my colocated box, hell I can even do DNS for you if you like
08:58 PM rue_shop3: I have it on the new server
08:59 PM rue_shop3: http://ruemohr.org/%7Eircjunk/tutorials/elex/hobbyservo/servo101.html
09:00 PM rue_shop3: dyndns went non-free
09:00 PM Tom_L: no-ip
09:00 PM Tom_L: i switched to them
09:00 PM Tom_L: when dyn went non free
09:00 PM aandrew: I had free no-ip for a while, just paid for it last month for the first time actually
09:00 PM aandrew: figured I was using it long enough I should probably throw them some bones
09:02 PM aandrew: I had subdomain support too so you could have automatically updated subdomain too
09:02 PM aandrew: only stopped doing that becuase I stopped using a hand-rolled firewall
09:06 PM Tom_L: it has to be looking at the wrong file somewhere because it's not changing
09:09 PM Tom_L: ok
09:09 PM Tom_L: so
09:09 PM Tom_L: when i send the same file to the fpga it's the modded one
09:10 PM Tom_L: there must be another step to generate for the flash i'm missing because i have the right bit file selected
09:13 PM Tom_L: yeah, it's not getting the right file
09:14 PM Tom_L: i take the same file and send it to the fpga and it's the right one
09:15 PM aandrew: Tom_L: has the file been adulterated at all? it's fresh off the tool?
09:16 PM Tom_L: yes
09:16 PM aandrew: hm
09:16 PM Tom_L: i changed the counter from 0-F to 0-9 and it works on the fpga but not the flash
09:16 PM Tom_L: changed the count rate too
09:16 PM Tom_L: and the flash is erased because when i reset it, it does nothing
09:18 PM Tom_L: veified it's the right chip selected also
09:21 PM Tom_L: ok this time when i programmed the flash i said to load the current bitstream to the fpga also and it loaded the fpga with the right bit file but the flash has the wrong one in it
09:21 PM Tom_L: soon as i reset the board, the old version ran from flash
09:26 PM Tom_L: i'm gonna make a new project and try that
09:28 PM rue_mohr: hmm
09:28 PM rue_mohr: your selecting the board in imapact, right?
09:28 PM Tom_L: yeah
09:29 PM Tom_L: ok synthesizing from a new project
09:30 PM rue_mohr: impact may still draw from the wrong folder
09:30 PM Tom_L: do i need a PROM file?
09:30 PM Tom_L: or just the bit file?
09:30 PM rue_mohr: I use a bit file for mine, but I hve to configure the fpga as an eprom programmer first
09:32 PM rue_mohr: so first I write the bit file for it to be a programmer, then I use the bit file I want to write and a flag for the programmer that makes it think its working with a eeprom programmer
09:33 PM Tom_L: i need to figure out how to add a new spi flash device. it keeps asking for a file
09:34 PM Tom_L: but i want to create a new file
09:34 PM rue_mohr: ah, maybe it needs an intermediate file like mine does?
09:34 PM Tom_L: i dunno, but i don't want to use one that's already created
09:35 PM Tom_L: i want to make a fresh one
09:42 PM rue_mohr: k
09:42 PM rue_mohr: so new project?
09:42 PM Tom_L: did that already
09:43 PM Tom_L: trying to assign a new flash device to the fpga in impact
09:43 PM rue_mohr: hmm
09:44 PM rue_mohr: I wonder what pins your flash is wired up to
09:44 PM rue_mohr: but your using windows or linux?
09:44 PM Tom_L: shouldn't matter on that
09:44 PM Tom_L: win though
09:45 PM Tom_L: i just don't know where to do that
09:45 PM rue_mohr: I cant help ya use the linux tools on windows
09:45 PM Tom_L: impact is the same either place
09:45 PM rue_mohr: I usually dont use impact
09:46 PM rue_mohr: with the spartin I use a command line tool
09:46 PM Tom_L: i tried 'add a device' that just adds another chip to the chain, not flash
09:46 PM rue_mohr: because impact doesn't support my programmer
09:47 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200624.jpg
09:47 PM rue_mohr: relax, grab some tea
09:47 PM Tom_L: wtf
09:49 PM Tom_L: the kicker is, i used to know how
09:52 PM Tom_L: found it
09:55 PM aandrew: rue_mohr: it's just me, but if that tank has so much buildup that you need a shovel, it's time to get another hot water tank. :-)
10:00 PM Tom_L: it's for his heat plant
10:00 PM Tom_L: i think
10:00 PM aandrew: yeah I know, I was making a funny
10:01 PM Tom_L: hahahahahaha
10:01 PM Tom_L: :)
10:01 PM aandrew: thankns. I feel better now
10:02 PM Tom_L: so how do i know if a device has more than one spi channel?
10:02 PM aandrew: hm?
10:02 PM aandrew: you mean multiple data lines, or multiple chip selects?
10:02 PM Tom_L: says it has dual and quad so it must support it
10:02 PM Tom_L: spi
10:02 PM Tom_L: https://www.elinux.org/images/f/f5/Winbond-w25q32.pdf
10:03 PM Tom_L: i assume it would program faster with more channels
10:03 PM aandrew: yes it does
10:03 PM aandrew: double to 4x speed
10:05 PM Tom_L: i would assume since they used that chip they wired it to use them all?
10:05 PM aandrew: I don't know what you're referring to but it's possible, yes
10:06 PM aandrew: I had to use a full-out parallel Flash chip on a PCIe design because the FPGA needed to be reconfigured and running within something like 50ms from boot to meet PCIe specs
10:07 PM Tom_L: gawd this is slow
10:08 PM Tom_L: i don't know how that works on spi
10:09 PM Tom_L: 1 2 or 4 data streams
10:09 PM aandrew: there are SPI read/write commands that say if it's a single, dual or quad transfer
10:09 PM Tom_L: i have a config file for each one
10:09 PM Tom_L: i selected 1 for now
10:10 PM Tom_L: but it's going alot slower than i recall
10:11 PM Tom_L: for now i just wanna see it work right
10:14 PM Tom_L: well it finally loaded the right .bit file
10:21 PM Tom_L: i don't recall it taking this long to program the flash
10:26 PM Tom_L: still not doing what it's supposed to
10:28 PM rue_shop3: hmm
10:28 PM rue_shop3: where is the eeprom config then?
10:34 PM Tom_L: it sees the new .bit
10:34 PM Tom_L: in impact...
10:34 PM rue_mohr: ok
10:34 PM Tom_L: and i can edit the flash parameters
10:34 PM rue_mohr: it gives you a warning that it changed, right?
10:34 PM Tom_L: but it just doesn't seem to take the right program
10:34 PM Tom_L: yes
10:34 PM rue_mohr: hmm
10:35 PM Tom_L: so now the part is blank and it does nothing
10:35 PM Tom_L: so i know it's erased
10:35 PM rue_mohr: try renaming the folder of the program its using and see what it says
10:36 PM Tom_L: and i can program the xilinx chip and it does as expected
10:36 PM rue_mohr: yea
10:36 PM Tom_L: but the same file to the flash runs different
10:36 PM rue_mohr: no its pulling it from another folder
10:36 PM rue_mohr: I'm sure of it
10:38 PM Tom_L: it won't let me rename the folder with webpack open
10:38 PM rue_mohr: of the other project?
10:38 PM rue_mohr: thats cause its keeping the files open
10:38 PM Tom_L: i renamed the bit file
10:38 PM rue_mohr: wait
10:38 PM rue_mohr: rename the whole folder of the project that its flashing instead of what your asking it to
10:39 PM rue_mohr: I think its flashing the bit file from another folder
10:39 PM Tom_L: no it's not
10:39 PM rue_mohr: if you dont make the folder inaccessable, it wont complain
10:39 PM rue_mohr: ok
10:39 PM Tom_L: because i renamed it and now it won't program the fpga
10:39 PM rue_mohr: do not rename the folder your working in
10:39 PM rue_mohr: rename the other folders :)
10:40 PM rue_mohr: impact seems to pull the files from the first directory it was ever configured for
10:41 PM rue_mohr: when I was using it, I had to keep going back to the folder of my current project
10:41 PM rue_mohr: it was really annoying
10:42 PM Tom_L: well writing the flash takes forever so it'll be a few
10:42 PM rue_mohr: ?
10:42 PM rue_mohr: i recall a few mins
10:43 PM Tom_L: the fpga is much faster
10:43 PM rue_mohr: heh, flash is same speed
10:43 PM aandrew: well reading is significantly faster than erase/program :-)
10:43 PM Tom_L: i can write the program to the fpga in a few sec
10:44 PM rue_mohr: direct, yes
10:44 PM Tom_L: to the flash takes a few min
10:44 PM rue_mohr: yea
10:44 PM Tom_L: 40%
10:44 PM Tom_L: and that's at 4x
10:44 PM aandrew: it's also possible the programmer is using ridiculously slow spi clock
10:44 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200623.jpg
10:44 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200624.jpg
10:44 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200625.jpg
10:44 PM rue_mohr: http://ruemohr.org/~ircjunk/tempimage/p1200626.jpg
10:45 PM rue_mohr: some images while you wait
10:45 PM Tom_L: you made a mess of the yard
10:45 PM aandrew: kind of looks like you're trying to build SpaceShip One
10:46 PM aandrew: well in a redneck kind of way but still
10:46 PM Tom_L: is that a new one?
10:46 PM rue_mohr: yea, this is for a ...
10:46 PM Tom_L: new to you ..
10:46 PM rue_mohr: hmm either boiler for a truck or solar water pump
10:46 PM rue_mohr: not sure yet
10:46 PM rue_mohr: probably solar pump
10:46 PM rue_mohr: the big impact cant get the electrode out :S
10:46 PM aandrew: I kind of want to play with those solar heaters
10:47 PM aandrew: the evacuated glass ones
10:47 PM rue_mohr: I'll try harder when its day tommorow
10:47 PM Tom_L: ahh i forgot about those water pannels you made
10:47 PM rue_mohr: so, I think this pcb is ready, should I ship it?
10:47 PM Tom_L: if it's ready
10:48 PM Tom_L: check it again
10:48 PM rue_mohr: well I think its ready
10:48 PM rue_mohr: I been looking at it a lot
10:48 PM rue_mohr: there is 1 unused io thats bugging me
10:48 PM rue_mohr: I could bring it out to a via
10:49 PM Tom_L: not running the right program
10:49 PM Tom_L: wtf
10:49 PM rue_mohr: ok, what program is it running
10:49 PM Tom_L: counts 0-9 slow
10:49 PM rue_mohr: ok, what program does that
10:50 PM Tom_L: should be counting 0-F fast
10:50 PM Tom_L: same one
10:50 PM rue_mohr: no there is another folder with that program in it
10:50 PM Tom_L: i just edited it and re syntyesized it
10:50 PM rue_mohr: where is it?
10:50 PM rue_mohr: there is another bit file
10:50 PM rue_mohr: somewhere
10:50 PM rue_mohr: in another folder
10:51 PM rue_mohr: that counts 0-9 slow
10:51 PM rue_mohr: lean back, sip some tea and ponder where that other bit file is
10:52 PM Tom_L: i just deleted all .bit files from the first folder down
10:52 PM rue_mohr: I was going to suggest that
10:52 PM rue_mohr: the proceeding error will be interesting
10:52 PM rue_mohr: because it will contain a folder name
10:53 PM rue_mohr: which will give away its twisted deception
10:54 PM rue_mohr: ok, how about this, I'll load it into osh and see if it goes, and what it'd cost
10:54 PM Tom_L: should i try loading the fpga first?
10:54 PM rue_mohr: na
10:58 PM Tom_L: it did ask wtf this time
11:00 PM rue_mohr: and what folder was is going to!!!!
11:00 PM Tom_L: i dunno, it never said
11:00 PM rue_mohr: what!?
11:01 PM Tom_L: it wouldn't start programming. it just sat there
11:01 PM rue_mohr: its supposed to say "cant find drive:/path/to/cursid/bad/setting/"
11:01 PM Tom_L: no indicators
11:01 PM rue_mohr: :/
11:02 PM rue_mohr: I have to add a solder mask around my test vias
11:02 PM Tom_L: see good i said check it again :)
11:03 PM rue_mohr: I didn't know vias didn't have that
11:03 PM Tom_L: that might not matter that much
11:04 PM Tom_L: i remember why i tested to fpga all the time now
11:05 PM Tom_L: still the wrong one
11:05 PM rue_mohr: how!!!
11:05 PM Tom_L: not a fucking clue
11:05 PM aandrew: ... it's not something stupid like WP asserted?
11:05 PM aandrew: is the applied voltage drooping, causing the chip to ignore writes?
11:06 PM Tom_L: and i flash that to the fpga and it works as expected
11:06 PM rue_mohr: Tom_L, do you have a pdf for the board?
11:06 PM Tom_L: aandrew, i doubt it. i can erase and blank check it
11:06 PM aandrew: ok
11:06 PM aandrew: erase, blank check, then reboot -- is the FPGA operating as expected?
11:08 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/xilinx/New_Board/
11:09 PM aandrew: that does not look like a qspi chip
11:09 PM rue_mohr: hmm, I dont know what those pins are its connected to
11:09 PM Tom_L: ?
11:09 PM Tom_L: U8
11:09 PM rue_mohr: oh I been looking at BGAs too long :)
11:09 PM Tom_L: and i physically checked it
11:09 PM rue_mohr: 38 70 64 and 65
11:09 PM rue_mohr: but
11:10 PM rue_mohr: IO L65N , IO L1P, IO L3N, IO L3P
11:10 PM rue_mohr: where is my pdf..
11:11 PM Tom_L: i just uploaded a datasheet folder
11:11 PM Tom_L: all the critical chips
11:11 PM rue_mohr: think mine is on the same pins?
11:11 PM Tom_L: your pin descriptions are different
11:11 PM Tom_L: dunno about physical pinout
11:12 PM rue_mohr: IO L1P, IO L3P, IO L3N, IO L65N
11:12 PM rue_mohr: sweet
11:12 PM rue_mohr: so
11:13 PM rue_mohr: I have this bit file that makes the fpga into an eeprom programmer
11:13 PM rue_mohr: you push that to the fpga, then use the fpga as if it were a programmer for the eeprom
11:13 PM rue_mohr: the gui there might abstract that
11:13 PM rue_mohr: do a file search...
11:13 PM Tom_L: i had this working
11:13 PM rue_mohr: I beleive you
11:14 PM rue_mohr: :)
11:14 PM Tom_L: i've slept since then
11:14 PM rue_mohr: look for
11:14 PM rue_mohr: xc6slx16_cs324.bit
11:14 PM rue_mohr: anywhere
11:14 PM rue_mohr: its the bit file to make the fpga into a programmer for the eeprom
11:15 PM Tom_L: no, why would i have that file anyway?
11:15 PM Tom_L: that's a polprog rue_mohr thing
11:16 PM rue_mohr: it might need it to make the fpga into a programmer for the eeprom
11:16 PM rue_mohr: "Work in ISF mode to program an internal serial flash memory"
11:16 PM rue_mohr: have you seen any mention of ISF mode?
11:16 PM Tom_L: hard to say
11:16 PM rue_mohr: as you been going thru the menus
11:17 PM Tom_L: would that be in impact?
11:17 PM rue_mohr: yes
11:20 PM Tom_L: sfv, stapl, xsvf file options. never ever have used those
11:21 PM rue_mohr: sfv is a record of the jtag transaction that can be replayed
11:22 PM rue_mohr: "3 boards will cost $24.80 "
11:22 PM rue_mohr: I dont have to order 3 do I?
11:22 PM Tom_L: yup
11:22 PM Tom_L: you get 3 no matter what
11:22 PM rue_mohr: huh
11:22 PM rue_mohr: well, thats still not that bad
11:22 PM Tom_L: doing a full chip erase on the flash
11:23 PM Tom_L: blank check
11:24 PM rue_mohr: topping up my truck today cost $87
11:24 PM Tom_L: what's the price of gas there?
11:24 PM Tom_L: geeze
11:24 PM rue_mohr: exactly
11:24 PM rue_mohr: almost $2/L
11:24 PM Tom_L: 2.88 gal here
11:25 PM Tom_L: for god's sake don't spill any
11:25 PM rue_mohr: well, should I order it?
11:25 PM rue_mohr: or save it and sit on it for a few days
11:25 PM Tom_L: it's your party
11:25 PM rue_mohr: yea, I'v already eaten the whole cake
11:26 PM Tom_L: i generally would sit on mine
11:26 PM rue_mohr: k
11:26 PM Tom_L: unless it was an edit i knew about already
11:26 PM Tom_L: remember that 32 experimenter with the reversed program pins?
11:27 PM Tom_L: that was fault of that one damn pdf
11:27 PM Tom_L: i sent you one
11:27 PM Tom_L: long time ago
11:27 PM rue_mohr: I never used that connector, I always used the 10 pin, there was only 1 version
11:27 PM Tom_L: 40 pin dip
11:27 PM rue_mohr: everyone was stepping in that bucket tho
11:27 PM Tom_L: part is blank
11:27 PM Tom_L: power cycling
11:28 PM Tom_L: and nothing happens so it IS blank
11:28 PM Tom_L: now what?
11:28 PM aandrew: hm
11:28 PM rue_mohr: well
11:28 PM rue_mohr: see if you can find any mention of ISF mode in the menus of impact
11:29 PM aandrew: ISF?
11:29 PM rue_mohr: tho, if you erased the chip, it lends that you can talk to it
11:29 PM rue_mohr: xc3sprog says it uses isf mode
11:29 PM rue_mohr: it creates a jtag<->spi bridge with the fpga to program the eeprom
11:30 PM Tom_L: for batch programming
11:30 PM rue_mohr: no
11:30 PM rue_mohr: for eeprom programming
11:30 PM rue_mohr: that how mine does it
11:30 PM rue_mohr: I use two commands
11:30 PM rue_mohr: flash write
11:30 PM rue_mohr: -----------
11:30 PM rue_mohr: xc3sprog -c ft232h xc6slx16_cs324.bit
11:30 PM rue_mohr: xc3sprog -c ft232h -I main.bit
11:31 PM rue_mohr: the first one makes the fpga into an eeprom programmer
11:31 PM rue_mohr: the second one uses that programmer to write to the eeprom
11:31 PM Tom_L: no mention of it anywhere
11:32 PM rue_mohr: ok
11:32 PM rue_mohr: if you were on linux...
11:32 PM rue_mohr: :)
11:32 PM Tom_L: it's fsking with my wireless kbd though
11:32 PM rue_mohr: ?
11:33 PM Tom_L: i have it in linux but it works the same
11:33 PM rue_mohr: but on linux you can use xc3sprog
11:33 PM rue_mohr: I think
11:33 PM rue_mohr: cause, to think if it, I dont know if it supports the cable you use...
11:33 PM rue_mohr: it might...
11:34 PM rue_mohr: I had a hard time with mine, xc3sprog was the only thing that seemed to support it
11:34 PM Tom_L: loading a different project
11:34 PM Tom_L: to see
11:34 PM rue_mohr: everyone seems to be using really expensive hardware
11:34 PM Tom_L: i've been using this for a very long time
11:35 PM Tom_L: but not for a long time
11:35 PM rue_mohr: I wish I'd come across some of the xilinx stuff in like 2002
11:35 PM rue_mohr: then again, I dont think the chip I use to program was out then
11:35 PM rue_mohr: even the info out today behaves like a brick wall to people trying to get into it
11:36 PM rue_mohr: nobody says you dont need a fancy dev board or a $50 programmer
11:36 PM rue_mohr: that dead bug bga is proof
11:36 PM rue_mohr: thats like a sub-$20
11:43 PM Tom_L: so i'm supposedly loading a completly different project into the flash
11:44 PM rue_mohr: I think thats whats going on, but there is a problem
11:44 PM rue_mohr: you deleted all the other bit files
11:44 PM rue_mohr: that you know of
11:44 PM rue_mohr: so,
11:50 PM Tom_L: i may know what is going on
11:53 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/xilinx/New_Board/HowtogenerateanMCSfileusingiMPACT.pdf
11:53 PM rue_mohr: whats mcs?
11:53 PM Tom_L: the config file for the flash
11:53 PM rue_mohr: oh
11:54 PM rue_mohr: I'm sorry I can only really sit back and watch
11:54 PM rue_mohr: I'm excited cause the board is loaded to osh
11:54 PM rue_mohr: aandrew, you up?
11:56 PM Tom_L: that may not apply to me though
11:56 PM Tom_L: i'm not sure yet