#garfield Logs

Sep 09 2020

#garfield Calendar

09:38 AM rue_mohr: Tom_L, do you know a good chart for rake angles on twist drills?
09:57 AM zhanx_workshop: rue redoing my workbench tops
09:57 AM zhanx_workshop: 3 layers of white glue heat gunned into the OSB sanding before and after
09:57 AM zhanx_workshop: 2 layers of primer
09:57 AM zhanx_workshop: 3 layers of rubberized paint
09:58 AM zhanx_workshop: next i am mounting the grinding wheel, drill press and vice in a cement top (i have the stuff so its cheaper)
10:23 AM polprog: https://polprog.net/rozne1/ircjunk/gal/galnotes.txt
10:23 AM polprog: i wonder if the antistatic rubber mat i bought last year stopped being smelly
10:24 AM polprog: if so, i could lay it on the bench. the cork got a bit dirty in one spot..
12:28 PM Tom_L: rue_mohr, http://www.mitsubishicarbide.com/en/technical_information/tec_rotating_tools/drills/tec_drills_technical_top/tec_drilling_terminology
12:29 PM Tom_L: https://www.regalcuttingtools.com/learning-center/articles/which-drill-point-angle-should-i-be-using
01:00 PM Tom_itx is now known as Tom_L
03:07 PM polprog: the GAL phase comparator is going well
03:08 PM polprog: i may be able to build the PLL today
03:09 PM polprog: i just need to buffer the input WFMs
04:40 PM polprog: 16v8, two sr flip flops and an AND gate programmed inside the gal
04:40 PM polprog: hct14 for buffering the input clks
04:40 PM polprog: my new opamp ring oscillator so i can have three waveforms with three phase shitfs to choose from
04:41 PM polprog: and the 4th opamp is the integrator for the voltage output
04:41 PM polprog: i get 3.6V for in phase and 4.2 for counterphase
04:41 PM polprog: i should probably also divide the input clks by 2, because they are not 50% dity
04:41 PM polprog: duty
06:44 PM rue_mohr: did you make some kinda FSM phase comparator that outputs 8 bit values to a DAC?
06:46 PM Tom_L: not sure what angles you're interested in
07:04 PM polprog: https://www.analog.com/media/en/training-seminars/tutorials/MT-086.pdf
07:04 PM polprog: i have only made the phase detector so far
07:04 PM polprog: i simplified the design in that paper (well not that particular one but the schematics are the same, it was from AD as well)
07:05 PM polprog: ive notices both of these D flip flops have the data input tied high, so they are more of SR flip flops
07:06 PM polprog: then i experimented with the gal a bit and found a way to implement an sr flip flop in one OLMC
07:07 PM polprog: then i just made it two SR latches with a common reset and implemented the and gate.. all in the GAL, 3 equations
07:07 PM polprog: tomorrow ill try to make a VCO lock to the source oscillator
07:07 PM polprog: i could really use a sig gen now
07:07 PM polprog: :)
07:07 PM polprog: goodnight
07:09 PM polprog: oh the output voltage is the reset signal fed into the integrator. Its probably wrong so ill make the current source tomorrow..
07:09 PM rue_mohr: yea I need a nap
07:09 PM polprog: nighters
07:10 PM rue_bed2: what was I working on anyhow
07:10 PM rue_bed2: power supply
07:11 PM rue_bed2: power button for it
07:11 PM rue_bed2: some kinda square metalic