#garfield Logs

Jan 30 2020

12:05 AM rue_mohr: http://www.jb-electronics.de/html/elektronik/digital/d_lauf3.htm
01:41 AM rue_bed: so I can use that multiple clock edge trigger for a state machine for the encoder
01:42 AM rue_bed: I'll need to modify the counter, or make a new one that can do up/down
01:42 AM rue_bed: worried about z, he's dissapearing
01:46 AM rue_bed: module quadDecode( input channels[1:0], output up, output down);
01:47 AM rue_bed: always @ (posedge channel[0] or posedge channel[1] or negedge channel[0] or negedge channel[1]) begin
01:48 AM rue_bed: reg[0:1] lastState
01:49 AM rue_bed: case ({channels, lastState})
01:50 AM rue_bed: 4'h0:
01:50 AM rue_bed: 4'h1:
01:50 AM rue_bed: 4'h2:
01:50 AM rue_bed: 4'h3:
01:51 AM rue_bed: 4'hF: assign up = 1; //
01:51 AM rue_bed: endcase
01:51 AM rue_bed: endmodule
01:52 AM rue_bed: signed char offsets[] = {
01:52 AM rue_bed: /* 0000 */ 0,
01:52 AM rue_bed: /* 0001 */ +1,
01:52 AM rue_bed: /* 0010 */ -1,
01:52 AM rue_bed: /* 0011 */ ERROR,
01:52 AM rue_bed: /* 0100 */ -1,
01:52 AM rue_bed: /* 0101 */ 0,
01:52 AM rue_bed: /* 0110 */ ERROR,
01:52 AM rue_bed: /* 0111 */ +1,
01:52 AM rue_bed: /* 1000 */ +1,
01:52 AM rue_bed: /* 1001 */ ERROR,
01:52 AM rue_bed: /* 1010 */ 0,
01:52 AM rue_bed: /* 1011 */ -1,
01:52 AM rue_bed: /* 1100 */ ERROR,
01:52 AM rue_bed: /* 1101 */ -1,
01:52 AM rue_bed: /* 1110 */ +1,
01:52 AM rue_bed: /* 1111 */ 0
01:52 AM rue_bed: };
01:54 AM rue_bed: module upDownCtr(input clkUp, input clkDn, input rst, output reg [3:0] q);
01:54 AM rue_bed: upDownDecCtr
01:55 AM rue_bed: carry
01:56 AM rue_bed: module upDownDecCtr(input clkUp, input clkDn, input rst, output reg[3:0] q, output c);
05:01 AM Tom_L: looks like you got it mostly
09:28 AM rue_mohr: thats something to start with later
09:03 PM Tom_L: so
11:37 PM rue_mohr: did get anything done other than a first pass assemble of the fet drier
11:37 PM rue_mohr: its a real IR2110 and switches nicely even at 500khz