#garfield Logs

Dec 14 2019

12:19 AM rue_mohr: MoonyMoon,
12:24 AM rue_mohr: https://askubuntu.com/questions/821157/print-a-256-color-test-pattern-in-the-terminal
12:24 AM rue_mohr: MoonyMoon, ^^^
04:51 AM polprog: good morning rue_mohr
04:52 AM polprog: (im still not sure which nick to hilight)
04:52 AM polprog: i know oocd can use any programmer, when i get the board ill be experimenting :)
04:53 AM polprog: by the way
04:54 AM polprog: on my video about these PPC dvr boards someone said they were hacking linux on ppc and they shared a ppc jtag software and (judging by filename) wiggler schematics for that software
04:55 AM polprog: but for $9 i ordered the altera isb blaster and some altera fpga as wel... its a steal
04:55 AM polprog: s/isb/usb/
07:31 AM Tom_L: ok, spartan6 board on the way
10:21 AM rue_mohr: it doesn't matter, I am all nicks
10:22 AM rue_mohr: polprog, jtag isn't universal
10:22 AM rue_mohr: you have to have software that supports your target, and also needs to support your programmer
10:46 AM tiwake: rue_mohr: I just whipped up a little 555 timer and hooked up my shiny new oscilloscope to it
10:46 AM Tom_L: rue_mohr, i could have gotten the one with jtag and sent it to you
10:50 AM polprog: rue_mohr: i suspect that, but ive linked a post that shows someone successfully accessed a spartan 6 with the altera usb blaster clone
10:50 AM polprog: worst case scenario ill just use a parport wigler
11:10 AM rue_shop1: the software has to support the programmer and the chip
11:10 AM rue_shop1: Tom_L, I was avoiding anything with a $50+ pricetag
11:33 AM tiwake: https://cdn.discordapp.com/attachments/576778798905819156/655459597947109386/20191214_0004.jpg
11:57 AM Tom_L: yeah i know
11:58 AM Tom_L: i don't know where must of my stuff is so i got one with some stuff on ie
11:59 AM Tom_L: also, i'm pretty sure those fpga sync more than they can source
01:03 PM polprog: rue_mohr: i think openocd supports a wiggler.. and the spartan 6 as well
01:03 PM polprog: if it doesnt, ill just develop on windows.
01:04 PM Tom_L: polprog what are your plans for fpgas?
01:05 PM polprog: Tom_L: for now a blinky led. Later on ill probably be implementing a fast counter if its necesary
01:05 PM Tom_L: did you get the same board rue is getting?
01:05 PM polprog: its both for myself and for a project
01:05 PM Tom_L: and
01:05 PM Tom_L: are you going to use vhdl or verilog?
01:06 PM polprog: i think verilog, ive used verilog on an emulated fpga some time ago
01:06 PM polprog: you mean this board? https://www.ebay.com/itm/XC6SLX16-Spartan-6-Xilinx-FPGA-Development-Board-w-32Mb-Micro-SDRAM-Memory/222739647376?hash=item33dc514b90:g:MjgAAOSwa~ldbdA3
01:06 PM Tom_L: yes
01:07 PM polprog: so yeah. its the same board
01:07 PM Tom_L: https://www.ebay.com/itm/XC6SLX9-Starter-Board-Xilinx-Spartan-6-FPGA/112230313780
01:08 PM Tom_L: i just ordered one of those
01:08 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/temp/xilinx/xilinx1.jpg
01:08 PM Tom_L: i've had that one for quite a few years
01:09 PM Tom_L: never done that much with it
01:09 PM polprog: this looks oldish
01:09 PM polprog: 2001
01:09 PM Tom_L: yes
01:09 PM polprog: i went for the one w/o the bells and the whistles..
01:09 PM Tom_L: that's why i wanted the newer one
01:09 PM polprog: if i want a 7 seg array, ill just make a board with one :D
01:09 PM Tom_L: i don't have many whistles to add so i did
01:10 PM polprog: met a guy at our faculty who does electronics for all the physicists..
01:10 PM Tom_L: that old one is a cpld
01:10 PM polprog: i spilled that i only once managed to etch a board (my process was shit) and he gave me some proper glossy paper
01:10 PM Tom_L: been struggling with vhdl here a bit lately
01:11 PM Tom_L: verilog seems easier to learn
01:11 PM polprog: (his one is way lighter - i would print on the thickest one) - so ill be trying to etch something as soon as i need it
01:11 PM Tom_L: where are you?
01:11 PM polprog: i wrote some small up-counter in verilog and synthesized it with some software emulator
01:11 PM polprog: then viewed the traces in gtkwave
01:11 PM polprog: verilog seems way higher level than VHDL
01:12 PM Tom_L: vhdl was written by the govt. what do you expect
01:12 PM polprog: haha
01:12 PM polprog: after ive seen ladder logic, i dont expect anything particular
01:12 PM Tom_L: i'm trying to get a feel for both
01:13 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/temp/xilinx/
01:13 PM Tom_L: top.v and clkdiv.v go together
01:13 PM Tom_L: i did that way back when
01:13 PM polprog: oh, thanks. ill look into that
01:14 PM polprog: what i dont know is how to assign physical pins to virtual 'wires' in verilog.
01:14 PM Tom_L: not that pretty. i've been making notes in it
01:14 PM polprog: but ill get to that when the fpgas arrive
01:14 PM Tom_L: net
01:14 PM Tom_L: open a .ucf file and you'll see
01:14 PM Tom_L: err loc
01:14 PM Tom_L: not net
01:15 PM Tom_L: err both
01:15 PM Tom_L: look in the 'rue' folder there
01:15 PM polprog: got it
01:15 PM Tom_L: that's his first test
01:16 PM Tom_L: <0> indicates an element in an array there
01:16 PM Tom_L: assigned in the .v by net(2 downto 0)
01:16 PM Tom_L: etc
01:16 PM polprog: mm
01:17 PM Tom_L: then it would be net<0> in the pin file
01:17 PM Tom_L: or net(0) in the .v file
01:17 PM Tom_L: iirc
01:17 PM Tom_L: err maybe []
01:17 PM Tom_L: i get the 2 languages mixed up
01:19 PM Tom_L: http://tom-itx.no-ip.biz:81/~webpage/temp/xilinx/
01:19 PM Tom_L: you should grab the verilog and vhdl .pdf there too
01:21 PM Tom_L: you can assign the pins in the file or use the schematic editor in webpack
01:21 PM Tom_L: which in turn writes it out to the file
04:43 PM polprog: should i grab them now or will they be up in a month
04:43 PM polprog: ill guess i grab them now
07:29 PM Tom_L: mmm
07:31 PM Tom_itx: Behavioral code is higher-level and usually can't be synthesized. Constructs like loops, delays, and "initial" statements are behavioral. RTL code is lower-level and is intended to be synthesized.
07:32 PM Tom_itx: IE: architecture Behavioral of led_blink is
07:32 PM Tom_itx: vs: architecture rtl of led_blink is
07:32 PM Tom_L: this is in vhdl
11:18 PM Tom_itx: well at least it compiles now.
11:18 PM Tom_itx: haven't tested it.
11:24 PM Tom_itx: holy crap! it works
11:25 PM Tom_itx: been fighting this for days...
11:37 PM Tom_itx is now known as Tom_L
11:49 PM Tom_L: gives me a better understanding of how this works now
11:55 PM rue_mohr: Tom_L, the scope I got was out of new mexico
11:55 PM rue_mohr: I hope I didn't make a mistake not having it shipped to you first
11:55 PM Tom_L: yeah that's what you said
11:55 PM rue_mohr: if it arrives in peices I'm gonna be pretty cut-down
11:55 PM Tom_L: would be sad for sure
11:56 PM Tom_L: got this 4 digit hex counter working in .vhd
11:57 PM rue_mohr: ok
11:57 PM Tom_L: except the 4th digit doesn't work right
11:58 PM Tom_L: enough for tonight. i started out with zero and got this far... time to quit
11:59 PM rue_mohr: well god work!
11:59 PM rue_mohr: good even
11:59 PM rue_mohr: time for a new keyabord
11:59 PM Tom_L: i'll post what i got