#avr Logs

Mar 02 2022

04:42 PM specing_ is now known as specing
04:53 PM cehteh: and samples should be a power of two and can be as high as 256 without overflow
04:54 PM cehteh: important thing is that you initially want to prime it with acc = reading*samples; otherwise it starts from 0 slowly reaching the actual filtered value
04:54 PM LeoNerd: Woo. :) That does it
04:54 PM LeoNerd: I now have a little duty-cycle bargraph on my logic probe
04:54 PM cehteh: hehe
04:55 PM cehteh: i always talk about that how to read ADC's ... no one listens :D
04:55 PM LeoNerd: It's not super-brilliant but it manages to graph a 400Hz PWM generator for an LED just fine
04:55 PM cehteh: its so cheap to do
04:55 PM LeoNerd: Yeah... if I had spare hardware I'd consider that
04:55 PM LeoNerd: But I'd have to switch in some sort of resistor-capacitor filter on one of the pins and.. bleh
04:55 PM LeoNerd: This is pure software, by basically just capturing the digital state very often and counting high vs. low states
04:56 PM cehteh: rc filter is important as well even if its a really simple one
04:56 PM LeoNerd: https://www.tindie.com/products/leonerd/8-channel-signal-monitor/ -- it's another pin mode for this
04:58 PM cehteh: you can do some fancy math about sampling rate and RC fitler lowpass it around that (actually much lower since rc filter is pretty poor first order and you need the filter half the sampling rate)
04:58 PM cehteh: but some gut feeling/experimenting usually getting the fitler right as well
04:59 PM cehteh: like 10-100kOhms 1-100nF ...
05:15 PM LeoNerd: Woo, well it's not perfect but I think I have it working reasonably well
05:17 PM qu1j0t3: :)