#avr Logs

Feb 28 2022

04:42 AM specing_ is now known as specing
05:01 AM LeoNerd: Hrmm... 25m of cable linking a cheap USB-UART bridge to my outdoors weather station, running an ATtiny814. It generally works absolutely fine at 115.2kbaud, but... sometimes overnight when it gets cold it loses the odd byte or two
05:01 AM LeoNerd: Overall I'm quite impressed though - it seems more reliable than I first thought. Hopefully if I just bump it down to 57.6k that should fix it
01:41 PM joomla9: in avr ships, registers are directly mapped to lower part of memory. Doe this mean I? can either use `r1` directly in an assembly file, or use memory address `0x1` to load store from it?
01:41 PM joomla9: avr chips *
01:48 PM josuah: joomla9: as per my narrow understanding, there are two different address spaces: one for I/O register and RAM, and another one for program memory
01:48 PM josuah: -> a pure "harvard architecture"
01:49 PM joomla9: right but that not related to the question tho
01:49 PM josuah: convenient for efficient implementation of a CPU, but not convenient as there is a different set of instructions to act on each
01:49 PM josuah: but the registers are common to both
01:50 PM josuah: ah, indeed, misunderstood your question
01:51 PM joomla9: yes, i just want to make sire `r1` and the memory address `0x1` are the same thing
01:51 PM joomla9: sure *
01:51 PM josuah: yes ok, I never tried but that is how I understood it as well
01:51 PM josuah: do you have some usart or gpio blink code working for the chip you are checking?
01:51 PM nohit: they "point" to the same thing yes
01:51 PM nohit: but you should use r1 in assembly
01:52 PM joomla9: right, but i I just do /load/store to that same address it should accomplish the same, right? if all instructions take 1 clock, then nothing there is literally no difference?
01:53 PM joomla9: sorry typing too fast
01:56 PM nohit: well, just try it and see what happens
01:56 PM nohit: I don't think it works that way
02:01 PM josuah: that take me to wonder if there is any difference between register and memory addresses
02:03 PM josuah: > As shown in Figure 6-2, each register is also assigned a data memory address, mapping them directly into the first 32 locations of the user data space. Although not being physically implemented as SRAM locations, this memory organization provides great flexibility in access of the registers, as the X-, Y- and Z-pointer registers can be set to index any register in the file.
02:03 PM josuah: -- ATmega328P reference manual
02:04 PM josuah: so yeah, looks like you can access them by putting their address in register pairs X, Y and Z
02:05 PM josuah: that could work for making a loop that save/restore each register's value for instance, instead of copying each register one by one
02:06 PM josuah: but I imagine you would still need to load the 16bit addresses into here
02:06 PM josuah: joomla9: thanks for teaching me that feature :P
04:42 PM specing_ is now known as specing