#avr Logs

Nov 22 2020

02:32 PM fstd: asm volatile ("hcf");
07:19 PM fstd: atmegas don't have branch predictors, right?
07:21 PM fstd: so when a branch is taken, which as per the instruction set manual costs two cycles, does that account for the flushed pipeline?
07:21 PM fstd: so wouldn't the true cost of a taken branch be 3 cycles?
07:23 PM m4t: no idea but did you see https://www.arxterra.com/6-avr-looping/#BRANCH_PENALTY ?
07:27 PM fstd: i've seen it now, thanks. it seems to imply that the 2nd cycle of the branch instruction is used to fetch the branch target
07:27 PM fstd: if so that'd be cool, but i'm not sure if it's actually the case
07:27 PM fstd: i guess i run an unused timer/counter at CPU clock speed and do some measuring based on that