#avr Logs

Aug 14 2019

02:18 AM rue_bed: the ability to set and clear bits individualy on a microcontroller is really important, and microcontroller that cant do it is garbage
02:23 AM rue_bed: next thing ya know, they will bring back paged memory
04:51 AM djph: rue_bed: I thought the AVR line of micros did use paged mem... no, nevermind, it's too early
07:37 AM Kliment: anyone know if avr-gdb disassembly addresses are in bytes or in words?
07:42 AM polprog: always bytes
07:42 AM polprog: the values can be represented as words though
07:43 AM Kliment: awesome
07:46 AM Kliment: I'm trying to do a weird thing :)
07:47 AM polprog: haha, thats always a good start
07:48 AM Kliment: I'm copying a function to a different area in flash, then jumping to it
07:49 AM Kliment: So as far as I can tell, everything consistently uses byte addresses with the exception of the datasheet which uses word addresses
07:51 AM Kliment: This is a bit convoluted for silly reasons - this is on the at90usb1286, where there is a write-protected stock bootloader
07:52 AM Kliment: Said bootloader is (unsurprisingly) in the bootloader area
07:52 AM Kliment: Instructions that write to flash may only be triggered from inside the bootloader area, and may only write to outside the bootloader area
07:55 AM Kliment: The stock bootloader exposes a few functions for writing to flash that application code may call
08:00 AM Kliment: So, to allow programming devices using only USB, I have to keep the stock bootloader, but I want additional firmware self-update functionality that the stock bl does not support
08:01 AM Kliment: So what I've done is: divide flash area into two regions - old fw and new fw
08:02 AM Kliment: old fw writes new fw to new fw region, checks its integrity, then copies a function to an empty flash page and jumps to it
08:02 AM Kliment: that function copies new fw over old fw
08:02 AM Kliment: and then jumps to start
08:38 AM skz81: Unsure of what I say... But I would be surprized if PC internally addresses words (16 bits)
08:39 AM skz81: (while avr-gdb may convert it to bytes for more readability)
08:39 AM skz81: lemme check sothg
08:39 AM skz81: !mcu atmega328
08:39 AM skz81: :(
08:47 AM skz81: Kliment, pretty sure I'm right. atmega328 uses 14 bits (16K addresses) to map a 32K flash code region... So each item is 16bits !
08:49 AM Kliment: skz81: correct - underlying addressing is in words
08:49 AM Kliment: skz81: but the api to that still uses byte addresses (and ignores the lsb)
08:58 AM cehteh: eh
08:58 AM cehteh: program is word addressed always. (labels, jumps)
08:58 AM cehteh: but sram is obliviously byte addressed
09:04 AM Kliment: cehteh: pgm_read_word_far for example uses byte addresses
09:06 AM cehteh: thats a function who does some magic
09:07 AM Kliment: cehteh: and, amusingly, the stock bootloader's functions also eat byte addresses, even though the documentation describing them is all in words
09:08 AM cehteh: still the underlying arch is in works for *program* addresses ... whatever you do with that is your or the clibs job, but i thought you asked about disassembly
09:08 AM cehteh: so it depends in how/where addresses are used
09:09 AM Kliment: cehteh: I asked about avr-gdb specifically
09:09 AM Kliment: cehteh: and it seems to be byte addresses there
09:09 AM cehteh: ok i dont know that, i wouldnt expect it to translate stuf this way
09:10 AM cehteh: usually i dont use gdb
09:10 AM Kliment: cehteh: it's two bytes per instruction, right?
09:11 AM cehteh: mostly iirc few instructions are longer, but always multiple of 2 bytes
09:12 AM cehteh: and all jumps and addresses on assembler llevel to program code are word addressed
09:12 AM Kliment: cehteh: so gdb gives me 0x0000054c <+0>:push r4 followed by 0x0000054e <+2>:push r5
09:13 AM cehteh: of course when you use progmem or other tihngs to store data in flash things change and some compatibilit code is there to translate to byte addressing
09:24 AM skz81: IIRC the 1-cycle instruction are 1 word long. Longer instructions (jumps, ...) take more than 1 clock cycle to fetch, and then execute !
09:25 AM skz81: to* execute even
09:26 AM cehteh: i wasnt sure if there is a 1:1 relation between the 2 cycle instructions and their length
09:26 AM cehteh: how about multiply? is that 1 cycle or 2 cycle?
09:27 AM skz81: is n't multiply soft coded ?
09:27 AM cehteh: most newer megas have a hhardware multiplier
09:27 AM skz81: hum sorry i'm confusing with float
09:28 AM skz81: IIRC MUL can take many cycle
09:28 AM Fuchikoma: If the processor supports it, MUL and MULS are both 2-byte, 1 cycle instructions
09:28 AM skz81: nope, 2 cycles
09:29 AM skz81: sorry I was answering to myself ^^
09:29 AM skz81: https://www.microchip.com/webdoc/avrassembler/avrassembler.wb_MUL.html
09:30 AM skz81: I guess I had an old memory of 8086 stuff comming back in mind :p
09:30 AM Fuchikoma: Well that's interesting 'cause the PDF manual says 1 cycle
09:31 AM skz81: as you said "if the hardware supports it"
09:31 AM Fuchikoma: As in, if the hardware has a multiply instruction at all
09:31 AM skz81: I guess this page was written before that, and not updated since
09:31 AM skz81: huh ok...
09:31 AM skz81: strange, then
09:32 AM Fuchikoma: I'd go with 2 since that makes more sense
09:32 AM Fuchikoma: Wouldn't be the first error in the documentation
09:33 AM Fuchikoma: Of course, if you're not a coward... https://sites.google.com/site/avrasmintro/home/2b-basic-math :)
09:38 AM cehteh: 2 word not 2 byte or? anyway the program bus can fetch 1 word per cycle, thus every 2 word instruction needs at least 2 cycles just because of that
09:39 AM Fuchikoma: Words: 1 (2 bytes)
08:11 PM [1]MrMobius is now known as MrMobius
11:40 PM day__ is now known as day