#avr Logs

Nov 02 2017

#avr Calendar

01:08 AM day__ is now known as daey
06:05 AM nux_: mornings
06:06 AM nux_ is now known as nuxil
06:08 AM polprog: morning
06:08 AM nuxil: So i set PCMSK |= (1 << PCINT0) | (1 << PCINT3); in my file. but how can i tell which pin did trigger the ISR ?
06:08 AM nuxil: how ya doing polprog
06:09 AM polprog: holidays here
06:09 AM nuxil: nice
06:09 AM polprog: i think you need to read the pins to know
06:09 AM thardin: isn't there a flag register for that?
06:10 AM NoHitWonder: well that port is that register
06:11 AM thardin: ah there's only PCIF
06:12 AM nuxil: hmm so i need to go over the pins and see which bits changed ? like oldbits = PINB ^ oldbits ? then see which of the pbN pins changed ?
06:12 AM thardin: so it seems
06:12 AM thardin: only one interrupt too
06:13 AM nuxil: alright
06:13 AM thardin: maybe you can use INT0 and PCINT0 to separate things if you only have two interrupts to monitor
06:14 AM thardin: err PCINTn where n != 0 :)
06:14 AM nuxil: well. i have 2 rotary encoders. i need to check which of them triggers since they do different things.
06:15 AM nuxil: time to do some tests :)
06:15 AM thardin: those are human time scale so probably no problem having them on the same interrupt
06:16 AM thardin: might want to do some debouncing of each one using a timer, but that's about it I think
06:16 AM polprog: you can debounce them using caps as well
06:17 AM nuxil: i have caps on them
06:17 AM thardin: caps increase BOM!
06:17 AM nuxil: 0.22uF
06:18 AM polprog: thardin: write in the specs that both encoders have to be turned at once, interrupt problem solved !
06:18 AM thardin: that'd be something
06:18 AM polprog: also you void the warranty by turning one at a time
06:18 AM polprog: ;)
06:19 AM nuxil: lol
06:20 AM thardin: was going to say you'll want some resistors to drain those caps, but pull-ups should do the job
06:20 AM nuxil: got that too :)
06:20 AM polprog: good
06:21 AM thardin: excellent. I think they're 10k, so your tau there is 2.2 ms
06:21 AM polprog: reasonable
06:21 AM thardin: quite
07:09 AM polprog: i guess i will write something like emil.fi/avr but for assembly
07:16 AM thardin: delightfully no-nonsense page
08:53 AM rue_bed: http://ruemohr.org/%7Eircjunk/avr/asmtut/asm_crash.html
08:57 AM rue_bed: hmm, I'll have to look for that again
09:01 AM polprog: mine seems to be more newb friendly :D
09:01 AM polprog: nice picture
09:32 AM Lambda_Aurigae: I would have done it as a motion gif of a lego something or other hitting the ground.
09:43 AM rue_mohr: hmm, that page could major use a redo
10:09 AM Emil: polprog: nice!
10:09 AM Emil: polprog: that's a really good choise
10:12 AM Emil: choice*
10:27 AM polprog: wrote something
10:27 AM polprog: i will finish it later
10:28 AM polprog: most likely after i set up wordpress under blog.polprog.net or something
10:28 AM Emil: >wordpress
10:28 AM Emil: pls no
10:28 AM polprog: blogspot/google sites suck
10:29 AM Emil: of course
10:29 AM Emil: but you have a bloody vm
10:29 AM Emil: you you don't wordshit
10:29 AM Emil: or blogshit
10:29 AM Emil: or google
10:29 AM polprog: did i say it will be on this vm?
10:29 AM Emil: You are a strong, independent student
10:30 AM polprog: i can set up a subdomain to the webhost i used to host my older blog on
10:30 AM polprog: i would never run WP or this VM
10:31 AM Emil: Don't run VM anywhere
10:31 AM Emil: sorry
10:31 AM Emil: wordpshit
10:32 AM polprog: i wont run WP on a VM
10:33 AM polprog: i have enough new stuff to learn so i want to keep with wordpres, at least i know it and used it for 3 years
10:34 AM polprog: i had enough shit with Jekyll
10:34 AM polprog: bloody millenial site generator, the "Quick star guide" on their site doesnt work
10:34 AM polprog: i dont feel like learning ruby
10:36 AM Emil: >ruby
10:36 AM Emil: wtf niga
10:36 AM Emil: plain text files
10:36 AM Emil: bro
10:37 AM polprog: plain text files
10:37 AM polprog: aha
10:37 AM Lambda_Aurigae: apache2 and be done with it.
10:37 AM Lambda_Aurigae: who needs the rest of that crap.
10:37 AM polprog: i would like some CMS
10:38 AM Emil: >apache
10:38 AM Emil: nginx is where it's at
10:38 AM Emil: apache is shiiit
10:38 AM polprog: oh yeah let's use that another web server i would have to learn
10:38 AM polprog: nginix
10:38 AM polprog: apache2 is goot
10:38 AM polprog: good*
10:40 AM Emil: git gud bro
10:40 AM Emil: fite me
10:40 AM nux_: cms ? open source or ? there are som ok ones. concrete cms, silverstripe. etc unless you want to go for drupal or jomla :p
10:42 AM Emil: polprog: I hear jekyll is good
10:42 AM polprog: Emil: https://i.warosu.org/data/lit/img/0066/59/1433791569071.png
10:47 AM nux_ is now known as nuxil
10:54 AM polprog: https://www.youtube.com/watch?v=gsNaR6FRuO0
10:56 AM nuxil: who can forget
11:13 AM Lambda_Aurigae: cp/del/mv all the content management I need.
11:13 AM Lambda_Aurigae: err
11:13 AM Lambda_Aurigae: cp/rm/mv
11:14 AM Lambda_Aurigae: maybe add in mkdir
02:36 PM polprog: screw this i will write it as html
03:08 PM Emil: polprog: .txt
03:08 PM Emil: do
03:08 PM Emil: it
03:08 PM Emil: fgt
03:08 PM Emil: You get that beautiful ascii art that way
04:40 PM polprog: Emil: asci arts are good but in this case i have some pics to embed
04:44 PM polprog: also
04:44 PM polprog: >Not using latex
04:44 PM polprog: pleb
04:59 PM Ameisen: stupid migraines
04:59 PM Ameisen: still trying to figure out how to rework a specific part of this firmware
05:17 PM antto: ctrl+a ...
06:26 PM aarcane: so uh.. Odd question, very technical... On an 8 bit AVR, can SBRC and SBRS cause branch misprediction? Are these CPUs even pipelined in a way that mispredicts happen?
06:29 PM LeoNerd: The CPU core is sufficiently slow and simple that there isn't any prediction going on
06:29 PM aarcane: okay, good
06:30 PM Lambda_Aurigae: not exactly pipelined...there is a little but it's not a predictive pipeline like an ARM or x86
06:30 PM Lambda_Aurigae: this makes it very easy to do cycle counting just by knowing the commands being executed.
06:31 PM aarcane: okay, good. I'm using sbrs and sbrc to implement a "branchless min/max" since it seems to work fairly well, and the bitshifting the MSB/LSB tricks are insanely many cycles on AVR
06:31 PM nuxil: hey stupid question. lets say i have OCR0A = 64, and i want a 50% duty cycle. can i just do OCR0B = OCR0A > 1 ?
06:46 PM cehteh: what mode?
06:46 PM cehteh: and you meant OCR0B = OCR0A >> 1 ?
06:47 PM cehteh: better rtfm, there are different waveform generator modes
06:49 PM cehteh: if you only need 50%, iirc there is a mode which toggles the output, then TOP defines the frequnecy and you dont need the comparators at all
08:21 PM nuxil: cehteh, yea i meant >> 1, and with mode7, sorry for not spesifying. anywho rightshift 1 will give me 50%,
11:19 PM Ameisen: why is that aarcane fellow implmeenting branchless anything
11:19 PM Ameisen: branchless only helps if it's fewer cycles, since the branch cost is known
11:21 PM tpw_rules: probably cause they're constant time
11:22 PM tpw_rules: sbrs/sbrc takes the same amount of time total whether it skips or not. a branch takes more time if it doesn't branch
11:23 PM tpw_rules: to execute the not-branched-over insn
11:26 PM Ameisen: It's trivial to make a branch constant time
11:26 PM Ameisen: add a nop to the taken branch.
11:26 PM Ameisen: :D
11:26 PM Ameisen: or vice versa, whichever you need
11:33 PM Ameisen: tpw_rules - strictly speaking, though, the skip instructions don't take constant time...
11:33 PM Ameisen: as per atmel documentation, they take 1 cycle if if the condition is false, 2 cycles if it's true and 1 word is skipped, and 3 cycles if it's true and two words are skipped
11:42 PM tpw_rules: yes, but the skipped instruction would have taken those cycles
11:42 PM tpw_rules: were it not skipped
11:42 PM tpw_rules: i wasn't sure how to make that come across
11:50 PM rue_mohr: are you lot arguing about my while(1); argument?
11:54 PM Ameisen: tpw_rules - True, but you can emulate the same using a branch and a nop
11:55 PM Ameisen: and a jump, I 'spose
11:56 PM tpw_rules: but why would you
11:58 PM Ameisen: Because you're a compiler, and weren't written to use the skip instructions