#avr Logs
Jun 28 2017
#avr Calendar
05:52 AM Emil: I wonder if this footprint is too small:D
05:54 AM Tom_itx: not if you're a ninja
05:54 AM Tom_itx: or navy seal
05:54 AM Emil: I will march forward
06:47 AM JanC_ is now known as JanC
08:04 AM Jartza: Emil: btw. interesting to see which one of us gets the thermocouples first :)
08:04 AM Jartza: which reminds me, I need to order some chips for them
08:33 AM Emil: Jartza: you'll get it first
08:33 AM Emil: Yeah, true
08:33 AM Emil: I'm making another 100€ order to mouser/digikey soonish :D
08:33 AM Emil: Damn this interest of mine will bankrupt me
08:42 AM Jartza: hehe
08:42 AM Jartza: fortunately I can order parts from farnell to our company's account
08:42 AM Jartza: ..up to certain limit, of course
08:42 AM Jartza: but even for hobby-purposes
08:43 AM Jartza: it's called self-development fund :)
08:43 AM LeoNerd: Ah, presumably you can squeeze that in under the minimum-shipping radar too
08:44 AM LeoNerd: That often bites me
08:45 AM Jartza: well, usually whenever I order, my order is over 65€
08:45 AM Jartza: which includes free next-day shipping from farnell
08:46 AM LeoNerd: Ah.. often I'm just after one or two specific things, so I tend to have to predict requirements for other things in advance and stock up on supplies for other projects, to get into that region
08:46 AM Jartza: after summer vacation I'm going back to old customer where I worked like from 1-2 years ago... they have excellent lab-equipment there :)
08:47 AM Jartza: that's a bonus too
09:18 AM daey: Emil: what are you building?
09:34 AM Jartza: I decided not to order too much stuff again though. I'm dedicated to my stash currently.
09:35 AM Jartza: I decided that next two projects, whatever they will be, will use as much usable parts from my stash as possible :)
09:44 AM Emil: daey: it's just a simple breakout
09:45 AM LeoNerd: Jartza: Yah - BOM consolidation is useful when you have many projects. I'm discovering that
09:45 AM daey: but its work ;.;
09:45 AM LeoNerd: I'm redesigning the current probe adapter to use the same connectors as the fancier current probe plus, for that reason
10:05 AM Emil: daey: what's work
10:06 AM daey: Emil: having to take your stock into account when designing
10:07 AM Emil: ah
10:07 AM Emil: Well
10:08 AM Emil: Notreally
10:08 AM Emil: It actually saves you quite a bit of time designing
10:22 AM Jartza: I have lot of AVR chips in stock, so I'm gonna use them for my next projects (probably this wireless temp monitor & PID controller) and a lot of LCD screens etc
10:23 AM polprog: i have a lot (300) of octal latches
10:23 AM Jartza: heh
10:23 AM polprog: got them for $2
10:23 AM polprog: half a rell
10:23 AM polprog: reel
10:23 AM polprog: *
10:23 AM Jartza: I think I have about that many 595 shift registers
10:23 AM Jartza: half of them still through-hole ones
10:23 AM polprog: not sure what i could do with those latches
10:24 AM polprog: mine are SMD
10:24 AM Jartza: mine are about 50/50
10:24 AM Jartza: soic & dip
10:27 AM Lambda_Aurigae: make an LED 4D hypercube!
10:27 AM polprog: hmm
10:27 AM polprog: that could work
10:27 AM polprog: i could display a 4d hypercube on a 3d cube display
10:31 AM polprog: or even a 4d cube on a 2d display :P
10:44 AM Emil: Can I not fucking have kicad fucking add numbers to fucking all the fucking annotated things
10:44 AM Emil: Why the fuck do things must have numbers what is this shit
10:44 AM Emil: Fuck
10:44 AM polprog: meaning what
10:45 AM polprog: you dont like to have C1 when theres only one cap?
10:45 AM LeoNerd: Yah it insists on having a number on *everything*
10:45 AM LeoNerd: Even if, say, you place a schematic symbol to relate to an image logo you'll put on the board
10:45 AM polprog: id expect it to be able to manually edit the annotations
10:45 AM LeoNerd: LOGO1
10:45 AM polprog: lemme try
10:45 AM LeoNerd: You can edit them
10:45 AM LeoNerd: But if the reference does not contain at least one digit, KiCad will get upset
10:45 AM Emil: LeoNerd: yeah, you can
10:45 AM Emil: yeah
10:45 AM cehteh: you can edit them manually
10:45 AM Emil: and it will fucking delete the fucking footprintgs
10:45 AM Emil: Fucking hell
10:45 AM LeoNerd: LOGO is not good enough. It *has* to be LOGO1
10:46 AM cehteh: and its open source, just add the functionality you want
10:46 AM LeoNerd: Or LOGO1295 or whatever.. as long as there's at least one digit in there
10:46 AM polprog: what the fuck
10:46 AM polprog: it added a "1"
10:46 AM polprog: shit
10:46 AM LeoNerd: Welcome to 30 seconds ago ;)
10:46 AM polprog: xD
10:46 AM polprog: gonna have to learn altium now
10:47 AM Emil: polprog: don't do it man
10:47 AM LeoNerd: Emil: Oh, I always leave it on "keep extra footprints" for that reason. Having it remove things from the board on netlist reload is bad
10:47 AM Emil: polprog: contribute to KiCAD instead
10:47 AM polprog: i have to
10:47 AM Emil: polprog: you never have to
10:47 AM LeoNerd: On those rare times I know I've deleted a component, I delete it manually
10:47 AM Emil: LeoNerd: good point
10:47 AM polprog: LeoNerd: most of the time i reload the whole netlist
10:48 AM polprog: so i dont keep extra FPs
10:48 AM LeoNerd: It's easy to tell because there'll be a lot of DRC errors due to copper clash in the now disconnected component
10:48 AM LeoNerd: So you move the component out the way and notice there's no airwires left
10:50 AM polprog: "well do file, new, PCB, which stands for printed circuit board"
10:51 AM polprog: what is the target audience for this altium tutorial :D
10:51 AM LeoNerd: People who need to make a PCB and yet for some reason don't know what the word means... hrmmmm....
10:51 AM polprog: psst india
10:52 AM polprog: or shenzen
10:57 AM polprog: whoever at altium decided schmatics should have values and designators in serif font by default is an idiot, this just hurts to look at
11:32 AM polprog: looks like it's for freshmen
11:32 AM polprog: nice
11:32 AM polprog: at least it's nicely explained
12:17 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_19-44-56_dXlMVXxN.png
12:19 PM cehteh: lots free space
12:20 PM Emil: Mostly because "lol lets use the smallest fucking components there are ":D""
12:21 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_19-50-45_x7QNgkVp.png
12:21 PM Emil: Nightmare fuel
12:25 PM cehteh: what component is that?
12:27 PM gnom_ is now known as gnom
12:32 PM polprog: what exactly is U2?
12:33 PM polprog: it has a trace to a pin on U1
12:33 PM Emil: It's a voltage regulator >:D
12:33 PM polprog: what
12:34 PM polprog: its so tiny
12:34 PM Emil: http://www.digikey.fi/scripts/DkSearch/dksus.dll?Detail&itemSeq=231806072&uq=636342482120036137
12:34 PM Emil: Teeny Tiny :3
12:34 PM polprog: im sure you can go smaller
12:34 PM polprog: ;)
12:35 PM polprog: replace c8 with a bunch of small (0402 is it?) caps paralell, redundancy FTW!
12:35 PM polprog: is it 2 layer or 4 layer?
12:36 PM evil_dan2wik is now known as dan2wik
12:42 PM Emil: 2 layer ofc
12:42 PM Emil: Idon't have the fucking money to spend on some fancy 4 layer pcbs T.T
12:42 PM polprog: my man
12:42 PM Emil: polprog: c8 100u
12:43 PM Emil: Ain't replacing it with expensive as fuck 0402s :D
12:43 PM polprog: so 0402 caps are more expensive that 0603
12:43 PM polprog: ?
12:44 PM Emil: If you want high capacitances
12:44 PM Emil: And fucking kicad
12:44 PM Emil: still fucking whining about non connected padswtf
12:44 PM polprog: yeah, i saw on that pcbnew screenshot that you have ratsnest around there, gnds not connected, etc
12:45 PM eszett__: I replaced my SOD-123 by SOD-323 and I don't know why I did that..
12:45 PM eszett__: Now I consider replacing them again back to SOD-123
12:46 PM Emil: :D
12:46 PM Emil: It's SMALLER
12:47 PM cehteh: just pretend kicad is right and search your bugs :D
12:48 PM cehteh: so far kicad worked well for me, but i never did big things
12:48 PM polprog: most cases it was my mistake when kicad whined
12:48 PM cehteh: yes
12:49 PM Emil: cehteh: no it's established clearly that kicad is stupid af with "unconnected tracks errors"
12:49 PM polprog: its whining because it's not fully connected, it's on an ege
12:49 PM polprog: edge
12:49 PM cehteh: i always found that kicad was right, iirc sometimes by user errors having tracks in the wrong segment, but still
12:50 PM eszett__: I'm working with Kicad since 2 years, know all the bugs and shit, and I get along with it, but for professional work I wouldnt use it TBH
12:51 PM polprog: i remember when i was a total beginner, cursing at kicad saying "unconected nets", when i noticed (after a couple minutes) that i have 2 separate ground nets
12:51 PM polprog: two clicks later 0 errors found :)
12:52 PM cehteh: yes
12:53 PM Emil: Ah so
12:53 PM eszett__: I think it is abit annoying to have to draw a schematic bevor drawing the PCB layout. I would like to draw the PCB layout and the software creates the schematics automatically from that.
12:53 PM Emil: eventhough two pads connect
12:53 PM Emil: it's not enough
12:54 PM Emil: even if it can detect that pads and tracks are on top of each other
12:54 PM Emil: Aaalrighty then
12:54 PM Emil: Well, DRC shut up finally (since kicad is retarded and doesn't detect zone fills as connections)
12:56 PM eszett__: Emil: it should detect zone fills as connections
12:56 PM eszett__: at least for me it does
12:56 PM polprog: your copy is retarded, do and apt-get upgrade or whatever youre using
12:57 PM eszett__: I connected all my GND pads by nothing more than a copper fill
12:57 PM polprog: yeah
12:57 PM eszett__: Emil: which version are you running?
12:57 PM * eszett__ 4.0.6
12:58 PM * polprog 4.0.6
01:01 PM polprog: a storm is coming
01:01 PM polprog: nice
01:05 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_20-33-44_r7bIsAtq.png
01:05 PM Emil: Finishing touches
01:05 PM Emil: polprog: mine?
01:05 PM Emil: 4.0.6
01:07 PM Emil: And I mean it doesn't detect _all_
01:07 PM Emil: mostly
01:07 PM Emil: but not always
01:17 PM Emil: This is pretty cute :3
01:18 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_20-47-41_k1ZmdKdA.png
01:18 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_20-48-02_DJIwbF5T.png
01:33 PM polprog: nice via stiching
01:43 PM bss36504: Emil: OSHPark? Do they do castellated pads?
01:48 PM Emil: Oh this becomes even prettyer :3
01:48 PM Emil: bss36504: OSHPark yeah
01:48 PM Emil: And they do
01:48 PM Emil: "not officially"
01:48 PM bss36504: Interesting, I'll remember that
01:48 PM Emil: but they happily share a guide how to do it with them
01:49 PM Emil: http://docs.oshpark.com/tips+tricks/castellation/
01:49 PM Emil: polprog: thanks, it took some time to get right :)
01:49 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_21-19-09_jdW6DDkr.png
01:49 PM Emil: Even prettier :3
01:53 PM polprog: so it's an uart to 2.4G wireless bridge?
01:53 PM Emil: It can do anything you want it to do
01:55 PM polprog: i hope
01:55 PM polprog: :D
01:55 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_21-25-17_PUnTC3cS.png
01:56 PM Emil: https://emil.fi/jako/kuvat/2017-06-28_21-25-34_evbTyBkc.png
01:56 PM Emil: Allrighty
01:56 PM Emil: I think it's time to stop :D
01:57 PM Emil: Now on to designing the adapter board ":D"
01:57 PM polprog: whats the difference?
01:57 PM Emil: With what?
01:57 PM Tom_itx: top & bottom is the difference
01:58 PM Tom_itx: why are the holes on the edge?
01:58 PM Emil: Because "lol via stiching" :D
01:58 PM Emil: Looks cool af
01:59 PM Emil: (And because the NRF24L01+ requires good power and because I want the best SNR)
02:00 PM xentrac: anybody here used CIC filters?
02:00 PM Emil: xentrac: for what?
02:00 PM Emil: You might like to ask at #rtlsdr
02:00 PM xentrac: I was thinking of audio applications
02:01 PM Emil: It's the same theory
02:02 PM xentrac: yeah
03:24 PM Jartza: or #tldr ;)
06:23 PM Thrashbarg_ is now known as Thrashbarg
07:12 PM Thrashbarg_ is now known as Thrashbarg
09:17 PM enhering: hi
09:20 PM BongoShaftsbury: hi
09:21 PM enhering: calm night here
09:35 PM Thrashbarg: hmm
11:56 PM day_ is now known as daey