#avr Logs

May 16 2017

#avr Calendar

12:13 AM daey_ is now known as daey
12:59 AM vishwin60 is now known as vishwin
04:45 AM Thrashbarg_ is now known as Thrashbarg
11:33 AM LeoNerd: I have a board with two AVR chips on it, linked by the SPI bus because one acts as an SPI slave to the other. This means their MISO, MOSI and SCK pins are linked together
11:34 AM LeoNerd: If I want to ISP program the chip that acts as a master, I can just do that, because while in reset it floats the pin it uses as a slave select to the slave, which has a pullup resistor, so the slave sits idle having put hiZ on the MISO pin, and all works just fine
11:35 AM LeoNerd: But the converse doesn't apply; if I try to ISP the slave, the fact that the master is holding the SCK and MOSI pins in some state interferes with the programmer
11:35 AM LeoNerd: I could fix that by holding the reset button on the master chip, but then if I do that, both chips are in ISP mode on the same SPI bus and madness ensues
11:35 AM LeoNerd: Does anyone have any ideas on fixing that?
11:37 AM LeoNerd: I'm beginning to feel like some sort of switchable buffer or link on at least one of those lines between might be the best bet
11:47 AM Emil: LeoNerd: Heh, you ran into the same problem I had
11:48 AM Emil: LeoNerd: I just dropped the other avr :D
11:48 AM Emil: LeoNerd: but basically you need to have a clock switch
11:48 AM skz81: LeoNerd, if you *DON'T* connect ISP Vcc to board "general" Vcc, master is not powered and should not interfere... Or am I wrong ?
11:48 AM Emil: skz81: they will be powered through input pins
11:48 AM LeoNerd: Emil: "dropped the other AVR"?
11:49 AM Emil: LeoNerd: from the design
11:49 AM LeoNerd: Ah.. :/
11:49 AM LeoNerd: Butyah, both chips share a power supply, so I can't power one without the other. Even if I could, the ESD protection diodes will parasitically power them from the logic lines
11:49 AM Emil: LeoNerd: I think having a three way clock switch is the only solution
11:49 AM Emil: LeoNerd: like I said already ;)
11:50 AM LeoNerd: Hmm.. Possibly a 1G125 or 126 then, attached to one of the RESET lines
11:50 AM Emil: LeoNerd: nono
11:50 AM Emil: you can have just a jumper switch for the clock line
11:50 AM LeoNerd: Eh but that's messy and effort. a 1G126 can't be forgotten about
11:50 AM Emil: Whatcha mean effort?
11:51 AM Emil: It's literally just a 2x2 jumper
11:51 AM LeoNerd: Also the SOT-23 package of a 1G126 is smaller than the 2 header pins anyway :)
11:51 AM Emil: Well how are you controlling it?
11:51 AM LeoNerd: The RESET line of one of the AVRs
11:51 AM LeoNerd: The slave I imagine
11:52 AM Emil: And how are you solving the issue of two separate masters on same spi bus?
11:52 AM LeoNerd: When the slave isn't in reset state, the gate input is high, so the 126 is buffering the clock into the slave as normal
11:52 AM LeoNerd: When the slave is in reset state its gate input is low, so the 126 becomes hiZ, so there is no clock being driven into it
11:52 AM Emil: mate
11:52 AM Emil: you still have two masters on mosi and misop
11:52 AM LeoNerd: Not on MISO I don't
11:53 AM LeoNerd: Admittedly yes still on the MOSI line but that's OK; I can just reset the other chip as well anyway
11:53 AM Emil: well, share the design on a schematic and I'll poke holes at it
11:53 AM LeoNerd: If I hold both chips in reset, neither chip is driving the SPI bus at all
11:53 AM LeoNerd: But the presnece o fthat 126 inbetween the slave and master means the SCK part of the "bus" isn't a true bus any more
11:53 AM LeoNerd: Each chip has its own side of it
11:53 AM LeoNerd: IT's exactly identical to your jumper idea
11:54 AM LeoNerd: Just instead of a jumper I'm using a 1G126 as an electronically-controlled jumper, so I can't ever forget to put it back in "production" state after programming
11:54 AM Emil: draw it
11:55 AM * LeoNerd wonders if KiCad knows the 1G126
11:55 AM LeoNerd: probably not
11:55 AM Emil: well it's super fast to make one or you can use a general component, naming doesn't matter
11:56 AM LeoNerd: Still far slower than a piece of paper
12:00 PM * LeoNerd draws diagram on paper, takes photo, uploads to google drive, downloads to laptop, uploads to webserver because that's still fastest way
12:01 PM LeoNerd: http://home.leonerd.org.uk/local/screenie/two-avrs-isp.jpg
12:02 PM JanC_ is now known as JanC
12:02 PM LeoNerd: OK here we go. Two AVR chips, two ISP headers. U1 can be reflashed by using its ISP header without special consideration. U2 can be reflashed, provided either a) U1 is held in reset by putting a jumper on its own ISP header temporarily, or b) we do the same trick on the MISO line with a second 1G126 chip
12:03 PM LeoNerd: ... at which point I almost wonder if I can buy a 2G126 instead
12:03 PM LeoNerd: Emil: ^--
12:05 PM LeoNerd: The advantage of this setup, for me at least, is that U1 will be reflashed all the time in production, and its ISP header is brought out of the enclosure on a special connector (I repurposed a DE9 ;) ), so it means I can reprogram it without opening the case (a case which contains 230V if you touch the wrong parts)
12:05 PM LeoNerd: I shouldn't have to do U2 very much, but for occasional bugfixes and the like, if I have to, I still want to be able; this gives me that way
12:26 PM thebird is now known as prockbird
12:43 PM LeoNerd: Ahah; yes TI make a 2-gate variant, the SN74LVC2G126
12:51 PM LeoNerd: Though this does leave me the Fun and Exciting task of trying to mount a VSSOP8 (likely upsidedown) on some matrixboard
02:46 PM polprog: greetings from karlskrona!
02:55 PM Emil: LeoNerd: you need to have a pulldown then, too
02:55 PM Emil: or should have
02:56 PM LeoNerd: Mmm? Pulldown where?
02:57 PM Emil: On the master sck line
02:58 PM Emil: or I would
02:58 PM Emil: Though since that part has it's own vcc and gnd and reference?
02:58 PM Emil: If so then's it's not necessary
02:58 PM Emil: I first thought of it as a passive
02:59 PM LeoNerd: Hmm... I could potentially add one but I don't really foresee when it'd be used
02:59 PM LeoNerd: That pin in practice is always driven by someone or other
02:59 PM Emil: If it is active your don't need a pulldown
02:59 PM Emil: but umm
02:59 PM Emil: you should have a pulldown on reset, though
02:59 PM Emil: pullup*
03:00 PM Emil: I wish usbasp supported a selection line
03:00 PM LeoNerd: I believe there is one on the boards
03:00 PM Emil: would be kawaii
03:00 PM LeoNerd: The 328P is actually an Arduino Pro Mini
03:00 PM LeoNerd: There's that word again - you keep using that :P
03:00 PM Emil: Hehe
03:00 PM Emil: desu desu desu
03:00 PM specing: ardweenie
03:00 PM Emil: only hardware
03:01 PM LeoNerd: I'll make my point clearer:
03:01 PM Emil: why spin your own board and design if you can buy an easy to integrate board that benefits from economies of scale
03:01 PM LeoNerd: You keep using the word "kawaii" and I have absolutely no idea what it means!
03:01 PM Emil: it's especially true with the nucleo line
03:01 PM Emil: LeoNerd: lol
03:01 PM specing: LeoNerd: oh you sweet summer child
03:01 PM Emil: I mean, you have probably already associated an idea or meaning with the word
03:02 PM Emil: that's enough
03:02 PM LeoNerd: Nope. Never heard of it before
03:02 PM Emil: I use it half ironically, too, but it's only to convey a meaning
03:02 PM Emil: LeoNerd: I mean, you have the basic human algorithms in you
03:02 PM Emil: You can learn
03:03 PM Emil: Just take the ideas and feelings you have associated with the word and its meaning
03:04 PM Emil: LeoNerd: surprised you didn't [search engine as a verb] it already
03:05 PM Emil: I think urban dictionary says it well
03:05 PM Emil: 3. "I'm a crazy fangirl who does not care look into the actual Japanese language."
03:05 PM Emil: kawaii means cute, though
03:05 PM Emil: in actuality
03:05 PM LeoNerd: Right
03:27 PM xentrac: I think the only difference from "cute" I've encountered is that in English "cute" has the negative implication sometimes of "trivial, childish"
04:14 PM day_ is now known as day
06:44 PM evil_dan2wik is now known as dan2wik