#avr Logs

May 14 2017

12:52 AM evil_dan2wik is now known as dan2wik
04:48 AM _abc_: .
04:50 AM _abc_: I am getting compilation errors with binary constants, avr-gcc is a bit dated, things like TCCR0A = 0b01000010; results in wrong asm in lst file: ldi r24, 0x03; out 0x27, r24; ;; the ldi should load 0x42 not 0x03. Is this a well-known problem? ...
04:50 AM _abc_: ... Was it fixed?
04:50 AM * _abc_ reviews entire code body for any = 0b constants for now
05:00 AM _abc_: hmm okay it seems to work. I think my lst and c files got out of sync.
05:01 AM Emil: as always, pebkac ;)
05:29 AM _abc_: Emil: pbkc was eyeglasses related, solved. Non working CTC mode OC0A output on 328p seems to not be pbkc.
05:29 AM _abc_: Is there an errata for 328p wrt CTC mode?
05:32 AM Emil: pbkc?
05:32 AM Emil: pebkac has a special meaning
05:36 AM _abc_: pbkc is shorter and more to the point
05:36 AM _abc_: Also someone ddos'd my external router while we were talking. Using backup now.
05:38 AM _abc_: Emil: any ideas on any errata concerning TMR0 CTC mode with output toggle on OC0A on 328p, ever? I don't remember anything like that but who knows?
05:43 AM Emil: what's the problem
05:43 AM Emil: ?
05:43 AM Emil: The supported modes are clearly expressed in the datasheet
05:47 AM _abc_: The problem is the TCCR0A and B are set to enable OC0A, prescaler /1024, CTC mode, the PD DDR output pin on OC0A is set to output, verified output (low), and nothing toggles.
05:48 AM _abc_: tmr0_init() { TCNT0 = 0; OCR0A = 3; TCCR0A = 0b01000010; /* COM0A1:COM0A0=01 (OC0A on) WGM01:WGM00=10 (CTC) */ TCCR0B = 0 | TMR0_PSC ; } // TMR0_PSC is set to 0b111 elsewhere
05:49 AM _abc_: After this, and DDRD = ... init with (1<<PD6) set the OC0A output stays low, and under control of PORTD, should be taken over by TMR0 per ds and my experience.
05:49 AM _abc_: mcu is atmega328p for testing. Any ideas on what the frick is wrong Emil?
05:50 AM _abc_: Expected output at 8MHz rc clock selected is ~1000 Hz out on OC0A, square wave, 50% duty cycle.
05:51 AM _abc_: exact output expected is: 8e6/1024/(3+1)/2 = 976.5625 Hz
05:54 AM _abc_: aargh I selected external clock instead of /1024
05:54 AM _abc_: again pbkc.
05:54 AM _abc_: Sorry
05:56 AM _abc_: sigh.
05:57 AM _abc_: The icing on the cake is, this was the debug code, to output an audible tone. The working code outputs a higher frequency and uses the correct prescaler.
05:58 AM _abc_: bbl changing connection
05:58 AM _abc_ is now known as Guest82941
05:59 AM _abc_ is now known as _abc__
05:59 AM _abc__: .
06:00 AM Emil: pebkac ;)
06:00 AM Emil: It's like 99,9% time pebkac
06:01 AM Emil: I've learned to blame myself every time I do anythibg
06:21 AM _abc__: yes but sometimes the problem is fixed by making an a** of oneself asking on irc channels only to smear the egg@face better
06:21 AM _abc__: seems to be a necessary step. Anyway I've been off this project for a month, doing other things, takes a few bumps to get back to speed. Coming up nicely now.
06:30 AM _abc__: It appears that reading back fuses on locked devices (LBMODE=3) reads back fuses with unused bits masked out, using USBASP. Is this documented somewhere? This results in a readback compare error. Seems okay to program fuses with unused bits=1 if ...
06:30 AM _abc__: ... LBMODE=0, but with LBMODE=3, after lock bits are set, efuse and lockbits are read back with the top bits masked out.
06:31 AM _abc__: Meaning f.ex. write 0xFD into efuse reads back 0x05 and yields an error.
06:32 AM _abc__: Other devices seem to vary slightly, f.ex. 328 non 'p' does not do this. Should this be patched in USBASP? Has anyone addressed this little problem?
07:00 AM _abc__: .
07:10 AM Tachgone is now known as Tachaway
07:42 AM JanC_ is now known as JanC
12:18 PM rue_bed: hi
12:18 PM rue_bed: you trying to read a locked avr?
12:18 PM rue_bed: or just unlock it for re-use?
12:22 PM Chillum: can be done by glitching the CPU power supply
12:22 PM Chillum: but very tricky, almost random to achieve
12:26 PM Lambda_Aurigae: _abc_, when programming, always program unused bits as 1....it should always read them as 1.
12:27 PM Lambda_Aurigae: _abc_, people get verify errors all the time by assuming they are 0 when unused...
12:43 PM _abc_: Lambda_Aurigae: I know the theory, did so until now. Now using a 328p in locked mode LB3, the read back bits for efuses and lockbits have all unused bits zeroed. Example: programming extended 0xFD works, reading extended reads 0xFD ok unlocked LB0, ...
12:43 PM _abc_: ... reading extended reads 0x05 locked LB3.
12:44 PM _abc_: In addition to this, programming any reserved bits in fuses extended or lockbits to 0 to avoid above error, causes the device to program sucesfully and not operate. I don't know if both are needed to do that, I assume only one is enough.
12:45 PM _abc_: To verify: set extended = 0xFD, program device with lockbits LB0. reads back okay for extended and lockbits. Now set the lockbits to LB3. Read back extended and lockbits. Result: lockbits return something likx 0x33, extended returns 0x05.
12:45 PM _abc_: *like
12:47 PM _abc_: iow lockbits 7,6 are masked to 0? Same for "unused" bits in extended, which reads 0x05 (lowest 0,1,2 are in use)
12:48 PM _abc_: Note that 0x33 is not the intended lock bit combination at all when programming LB3 yet this is what is read back
12:50 PM Lambda_Aurigae: _abc_, with it locked, you can't read fuses and lock bits.
12:55 PM Lambda_Aurigae: as I recall, they should always read as 0 when locked.
12:57 PM _abc_: Actually you can read fuses and lockbits, nothing else besides signature and calibration?
12:57 PM _abc_: The makefile I am using has been in use for 10 years with 7 different avr cpus
12:57 PM _abc_: It is VERY unlikely to be the way I do things in it.
12:58 PM _abc_: USBasp might be a problem, as could be the fact that I hacked the avrdude config file to add 328p which was not in it.
12:58 PM _abc_: Could I have put in something in the avrdude conf which causes this?
12:59 PM Lambda_Aurigae: dunno.
03:21 PM _abc_: http://false.ekta.is/tag/avr/ yay I am famous.
03:25 PM _abc_: Note I actually added the patch to splint a while after that message, the patch is at http://peter5.50webs.com/free/
03:25 PM _abc_: (which is one of my webpages)
03:26 PM _abc_: The quoted text is present @^ as download run-splint-on-avr-gcc-code.sh
03:31 PM Jartza: (y)
05:13 PM eichiro_ is now known as eichiro
11:57 PM daey_ is now known as daey