#avr Logs

Apr 07 2017

12:17 AM daey_ is now known as daey
01:45 AM rue_house: is that more or less thana metric ton?
01:45 AM Casper: atleast he's lucky
01:46 AM Casper: at work, this week I got 2 computers to fix
01:56 AM polprog: Casper: id rather fix computers than that
09:55 AM leonardo_: hi
09:57 AM leonardo_: I want to program pwm on atmega32u4 with independent control of frequency and duty cycle
09:57 AM LeoNerd: Independent of what?
09:58 AM leonardo_: independent of one another
09:59 AM LeoNerd: The 32U4 has a total of four timer units, so you should be able to do four independent PWMs
09:59 AM LeoNerd: Or more if you pair them up for frequency
10:00 AM leonardo_: I frequncy needs to be 77.5kz,duty cycle should vary under program control between 50% and 20%
10:00 AM LeoNerd: OK
10:01 AM leonardo_: the datashet gives a formula for frequency only
10:01 AM LeoNerd: The duty cycle is whatever is in the OCxn register surely?
10:02 AM leonardo_: the datasheet gives a formula for frequency only
10:02 AM LeoNerd: Give or take CTC modes of course
10:03 AM cehteh: its just moderately simple math
10:04 AM cehteh: what resolution on the duty cycle do you need?
10:05 AM leonardo_: ocrnx defines the frequency according to datasheet, that's my problem
10:05 AM LeoNerd: Hrm?
10:06 AM LeoNerd: You might be looking at the wrong section, or maybe something about the use of the (usually) OCnA register for doing CTC-from-OCA mode
10:06 AM leonardo_: i just need 2 duty cycles 50% and 20%
10:06 AM LeoNerd: AVR timers I feel could be much simplified, by splitting them into two parts like the PIC ones
10:06 AM cehteh: that sounds reasonable simple
10:06 AM LeoNerd: on PIC, there's a counter module, and separate output-compare module
10:07 AM leonardo_: section 14.8.3 Fast pwm
10:07 AM LeoNerd: I often find if I am doing PWM, I want all the channels off the same counter. I'd like to have "counter 0" or "counter 1" be the counter, and set *all* the output compare modules to be using that
10:08 AM cehteh: do you need 20% and 50% exactly or would a slight dervitation be ok?
10:08 AM cehteh: LeoNerd: yes that would be nice
10:08 AM Haohmaru: LeoNerd the xmega timers are not bad
10:08 AM leonardo_: slight deviations are acceptable
10:09 AM LeoNerd: cehteh: Plus then I could have what I often want of, timer 0 = "burried" internal-only for timing clocking purposes, and timer 1 = "external" counter for all the PWMs
10:09 AM cehteh: often 2 counters would be enough for a lot things, and having 6 8 .. more output compare units on one counter
10:09 AM LeoNerd: Yes
10:09 AM cehteh: yes
10:09 AM cehteh: exactly
10:09 AM LeoNerd: Good, we're all in agreement
10:09 AM LeoNerd: Who's closest to the Microchip building? I can lend a burning pitchfork
10:09 AM LeoNerd: Well,... I say "burning". It'll actually be an LED candle flicker-like effect, for stage safety purposes
10:09 AM LeoNerd: Built on AVR timers ;)
10:11 AM LeoNerd: Oh just because I'm curious to know: hands up anyone who has ever used both (or more-than-one on larger timer units) compare match interrupts of the *same* timer unit?
10:11 AM leonardo_: LeoNerd: what is the appropriate manual and section ?
10:11 AM cehteh: heh a friend of me sampled the flicker of a real candle, and hardcoded that on a arduino to flicker a led
10:12 AM LeoNerd: I don't think I've ever done that. If I have interrupts from a timer, I'll only ever be using overflow or compA. If I'm using multiple compare units it's always for just PWM'ing output pins, and I don't have the software interrupts for those
10:12 AM cehteh: speak of overengineering
10:12 AM LeoNerd: cehteh: I spent quite a while working out the flicker effect
10:12 AM LeoNerd: Mine had to flare up and go out like a real candle, under DMX control
10:12 AM cehteh: :)
10:12 AM LeoNerd: Ohyes, mine is a DMX controlled LED candle.
10:12 AM LeoNerd: leonardo_: for what?
10:14 AM leonardo_: for looking up frequency and duty cycle in timer 1 fast pwm
10:14 AM cehteh: leonardo_: you pick a suitable prescaler and TOP to generate 77.5khz and then calculate the compmatch value for 50% and 20%, thats all
10:14 AM LeoNerd: Yah; duty cycle is just a fraction
10:14 AM enhering: TBS1102B Tektronics, around 700USD: http://www.baudaeletronica.com.br/osciloscopio-digital-tbs1102b-2-canais-100mhz-tektronix.html
10:14 AM LeoNerd: E.g. if your TOP is 200 and you want a 20% duty cycle, then you want the number 40
10:15 AM LeoNerd: Or 50% would be 100
10:15 AM LeoNerd: It's not difficult :)(
10:15 AM cehteh: when you only need 2 different duty cycles you can possibly run the counter quite slowly
10:15 AM LeoNerd: Yah
10:15 AM LeoNerd: For 20% and 50% I'd suggest your TOP probably wants to be (close to) an even multiple of 10
10:15 AM LeoNerd: What's the clock source? I'mg oing to presume 16MHz crystal
10:16 AM cehteh: well 77,5 is reasonable fast
10:16 AM LeoNerd: Yeah, that is a *fast* PWM
10:16 AM cehteh: if you want high precision/resolution that could be a problem, but with 2 duty cycles only thats not a problem at all
10:16 AM leonardo_: yes but where do i store that value of 40? yes 16mhz
10:17 AM LeoNerd: In the OCnRx registers
10:17 AM cehteh: leonardo_: first define a suitable prescaler
10:17 AM LeoNerd: OK, so 16MHz / 206.45 gives you 77.5kHz
10:17 AM cehteh: that is a prescaler where the counter runs little slower than your target frequency
10:17 AM leonardo_: lets talk about timer 1
10:17 AM LeoNerd: So *maybe* you just want prescale 1; even the next prescaler of /4 is a TOP of a mere 51.6
10:18 AM cehteh: then bump up the speed by reducing TOP to the target speed
10:18 AM cehteh: then determine 0.2*TOP is 20% and 0.5*TOP is 50%
10:18 AM LeoNerd: Personally here I'd go for prescale=1, TOP = 205
10:18 AM leonardo_: then top is 206
10:18 AM cehteh: i didnt do the math
10:18 AM cehteh: but its simple enough
10:19 AM LeoNerd: 205. :) Don't forget the offbyone
10:19 AM cehteh: yes
10:19 AM LeoNerd: The counter will *reach* the TOP value, and resets when it tries to increment *past* it
10:19 AM leonardo_: and duty is 103 and i use output A
10:19 AM LeoNerd: 102
10:19 AM LeoNerd: But yes; same principle
10:20 AM leonardo_: OCR1A gets 206
10:20 AM leonardo_: where does 102 go?
10:20 AM LeoNerd: 205 :) *ahem* But yes; whichever register is holding the TOP
10:20 AM LeoNerd: You'll have to check the various timer modes
10:20 AM cehteh: ;)
10:20 AM LeoNerd: In different modes of different timers, sometimes they use OCRnA to store the TOP, sometimes they use the ICPR
10:20 AM LeoNerd: The 16bit timers can usually do either
10:21 AM LeoNerd: Obviously timers without input capture units can't :)
10:21 AM cehteh: 16bit would be a waste since you only need 8 bit
10:21 AM LeoNerd: E.g. on the original 8bit timers ((DAMNIT ATMEL PLEASE GIVE US VERSION NAMES FOR THESE THINGS)) since you don't have an ICP, it can only count with TOP=compare A
10:21 AM cehteh: unless you can use a 64mhz counter ... but weirdo alerzt
10:21 AM LeoNerd: So in that mode, you've only really got one controllable output channel, being B
10:22 AM LeoNerd: Ooooh
10:22 AM LeoNerd: the 32U4 does have a PLL'able timer I think
10:22 AM cehteh: yes
10:22 AM LeoNerd: The odd 10bit Timer 4
10:22 AM LeoNerd: Depends how accurately you need this 77.5kHz
10:22 AM Haohmaru: 77500.0000000000000000Hz
10:22 AM LeoNerd: 16MHz / 206 == 77.6699 kHz
10:23 AM LeoNerd: Which is within 0.2% of your target
10:23 AM cehteh: 16000000 / 214 = approx. 74766.355
10:23 AM leonardo_: that's ok
10:23 AM LeoNerd: Er.. within 0.3% sorry. Rounding errors
10:23 AM cehteh: 16000000 / 213 = approx. 75117.371
10:24 AM LeoNerd: Soyeah; sounds like the 8bit is fine, No need to get in on that PLL unit
10:24 AM cehteh: well .. off workshop time, bbl
10:25 AM leonardo_: LeoNerd: how does channel B enters the picture?
10:25 AM LeoNerd: That's the actual output channel you'll be using
10:26 AM LeoNerd: leonardo_: On the "newer" AVR timers (such as the 16bit timers 1 and 3 in the 32U4), they can do CTC with the TOP value coming from the input capture register, In this mode, that leaves *both* A and B output channels free for doing PWM
10:27 AM LeoNerd: Because timer 0 does not have this ICP register, it has to keep the TOP value elsewhere. So in CTC mode, it uses compare channel A for the TOP value. Because of that, you can't now use channel A to output PWM; so you can only use channel B
10:27 AM leonardo_: You mean i will be using output B, yet the TOP will come from register A?
10:27 AM LeoNerd: The TOP will come from register A, yes. The output compare value will come from register B
10:28 AM LeoNerd: You're wanting a timer with custom frequency /and/ duty cycle. That's two parameters that need to be set
10:28 AM LeoNerd: Register A, the TOP value, is controlling the overall period of the counter (and hence its frequency); register B is picking the duty cycle of the B output within that counting range
10:31 AM leonardo_: ok, but i do not think the datasheet describes such combined operation any where. a reference please?
10:31 AM LeoNerd: I'm sure it probably does
10:32 AM Haohmaru: or there's another, sepparate document, which describes how to use timers in funky ways, with examples
10:32 AM LeoNerd: It's just Lego, really
10:32 AM Haohmaru: not really
10:32 AM Haohmaru: >:(
10:33 AM LeoNerd: As I said earlier: the AVR timers are a lot simpler to understand if you try to picture it as two separate pieces
10:33 AM LeoNerd: The counter part, the TCNTn register that is counting from 0 up to some TOP value; and the compare part, the OCRnx registers, which are testing to see if the counter is equal to their target value, and if so, do something
10:34 AM leonardo_: 'I'm sure it probably does' sounds like a contradiction in terms.
10:34 AM LeoNerd: In this setup, you're putting the timer into CTC mode (i.e. giving it some TOP value that isn't just 0xFF) to limit its counting range, and thereby control the counting period
10:35 AM LeoNerd: You're then using compare unit B to check when this count gets to either 20% or 50% of its full value, in order to output the PWM signal on the output pion
10:35 AM LeoNerd: pin
10:35 AM LeoNerd: It's Lego.
10:35 AM LeoNerd: A counting brick, stuck to a compare brick
10:36 AM * Haohmaru hits LeoNerd with two bricks
10:41 AM leonardo_: ok i think i start to get it. OR1A gets 206 and the frequency is 77.5kHz, OCR1B gets 103,then every time the counter reaches 103
10:41 AM LeoNerd: Indeed
10:42 AM LeoNerd: The odd shape here of using both compare registers is only because that's all that timer0 has. Were you doing this on timer1 or timer3 maybe, then it might look simpler by putting the period value into ICRn
10:42 AM LeoNerd: Then you'd be free to pick either actual output channel
10:53 AM leonardo_: output B becomes 1 and stays 1 till counter reaches 206 whet it resets to 0
10:53 AM JanC is now known as Guest75772
10:53 AM JanC_ is now known as JanC
10:54 AM LeoNerd: Indeed; this is how OCM CLEAR mode works
10:54 AM * LeoNerd feels sure this is all described in the datasheet
10:56 AM leonardo_: the datasheet says something about ICR1 not being double buffered and not recommended in case one chnges it on the fly
10:56 AM LeoNerd: Right; but you're not changing ICR here
10:57 AM LeoNerd: ... infact surely since you're using timer0 there *is* no ICR
10:57 AM LeoNerd: So you're probably not reading the right bit
10:57 AM leonardo_: but frequency does not change so i now understand it does not matter.
10:58 AM leonardo_: i want to use timer1 not 0
10:58 AM LeoNerd: Ahh. Right
10:58 AM LeoNerd: Yes; I generally use timer0 only for "buried" internal purposes; not with the output pins
10:59 AM LeoNerd: Those are my output pins of last resort.
11:00 AM leonardo_: i assure you i have perused the manual, i will look again, after your explanation.
11:00 AM LeoNerd: Actually, my current project needs 8 PWM channels for LEDs, so I've offloaded the entire thing to a separate chip
11:00 AM LeoNerd: Which is... Fun
11:00 AM leonardo_: Your two bricks approach really helped me understand it
11:01 AM leonardo_: Thank you so much!
11:05 AM * LeoNerd really quite serious - engineering is just sufficiently advanced form of Lego :)
11:46 AM Emil: leonardo_: you should read the datasheet more carefully
11:50 AM specing: AND BULGE YOUR EYES OUT WHILE DOING IT!
11:51 AM specing: *smallprint* make sure they don't fall out of their sockets, that would be a mess
11:54 AM leonardo_: Emil: after LeoNerd's explanation of principle the manual makes sense, but it must be read carefully
11:55 AM LeoNerd: The trick to reading datasheets is to do it multiple times
11:55 AM LeoNerd: They're not tutorials. They are reference information.
11:56 AM LeoNerd: They don't present information in a linear form easy to learn. They explain every concept in detail. But quite often the full consequence of something won't become apparent until you understand things afterwards
11:56 AM Emil: leonardo_: it is quite clearly said ; ö
11:56 AM Emil: ;)*
11:57 AM Emil: But yeah, all timers have two outputs and both can be pwm or frequency controlled
11:57 AM LeoNerd: Hah
11:57 AM LeoNerd: "all"
11:57 AM Emil: Usually the 16 bit timer can be both frequency and pwm controlled
11:57 AM LeoNerd: All timers, except those that have only one output. Or three.
11:57 AM Emil: yeah
11:58 AM Emil: But on the m32u4 there's two outputs iirc
11:58 AM LeoNerd: In practice, across all the ATmega and ATtiny chips, there's basically 3 different common kinds of timer
11:58 AM LeoNerd: There's the original "version 1" 8bit, usually timer0. There's the "version 2" 16bit with input capture, timer1. There's the 3-output version of that which is basically the same, just with three outputs. That appears on some of the newer ones
11:59 AM LeoNerd: Then there's a smattering of odd ones - tiny85's timer1 is weird. mega328P's asychronous timer2.
11:59 AM Emil: LeoNerd: those would be reslly quite new
11:59 AM LeoNerd: Not -that- new
11:59 AM LeoNerd: http://go.leonerd.org.uk/avr-timers is my summary
12:00 PM LeoNerd: 32U4 has 3 such timers - timer1/3 are 3output, timer4 is too. But that's another weird one... 10bit highspeed PLL
12:00 PM Emil: Oh, nice
12:01 PM Emil: Well, anycase, register descriptions are kawaii :3
12:02 PM LeoNerd: Isn't that an island in the pacific?
12:02 PM LeoNerd: Ohwait that's Hawaii
12:10 PM Emil: polprog: how's the circuut
12:19 PM leonardo_: LeoNerd: timer3 has 3 outputs but only A is brought to a pin, or am I misreading the datasheet again?
12:19 PM LeoNerd: Oh, on the 32U4 ?
12:20 PM LeoNerd: It's not entirely unheardof for pinout diagrams to have errors :)
12:20 PM leonardo_: yes
12:20 PM LeoNerd: Hm.. I do indeed only see an OC3A on this pinout
12:21 PM leonardo_: Yes i think so too.
12:23 PM leonardo_: So it is timer 1 after all!
12:24 PM LeoNerd: Huh; this does seem odd to have three output compare units but only bring one out into an IO pin
12:24 PM LeoNerd: There's surely got to be an error on the pinout diagram here
12:24 PM leonardo_: i mean it's timer 1 that must be used in my case.
12:26 PM LeoNerd: http://www.avrfreaks.net/forum/16-bit-pwm-atmega32u4 mentions this fact
12:27 PM LeoNerd: Those pins really are missing
12:27 PM LeoNerd: ... wow, this chip just keeps getting worse whenever I look at it
12:27 PM LeoNerd: Why is this chip simultaneously a) terrible, and b) the only decent USB-speaking ATmega?
12:29 PM * LeoNerd updates spreadsheet
12:32 PM leonardo_: i also like its differential ADC channels
12:33 PM LeoNerd: A lot of AVR chips have those
12:33 PM LeoNerd: The 32U4 is just terrible for IO pin placement. Take a look at where INT0 to INT3 are
12:33 PM LeoNerd: They collide with the UART and I²C module
12:42 PM Emil: wat :D
12:42 PM Emil: who the fuck decides on that?
12:43 PM LeoNerd: I don't know. I suspect someone rolled a particularly bad dice that day
12:43 PM LeoNerd: Anyway, the 32U4 is a prime example of why I REALLY WANT AN IO CROSSBAR
12:43 PM * LeoNerd continues to rage at Atmel
12:43 PM Emil: IO crossbar?
12:43 PM Emil: You mean selectable peripheral pins?
12:44 PM LeoNerd: Yah
12:44 PM LeoNerd: Like all the PIC24s have
12:45 PM Emil: That would indeed be super kawaii
12:45 PM LeoNerd: You keep using that word
12:45 PM LeoNerd: ??
12:46 PM Emil: Desu desu desu desu desu
12:46 PM Emil: Pakotan vain meemua
12:46 PM LeoNerd: ?
12:53 PM Emil: That's your daily Finnish lesson: Pakotan, which is pakottaa+n(genitive)+consonant gradation, means I am forcing, vain means only and meemua is a bastardation of meemiä, which is meemi+ä(something), meaning I am only forcig a maymay
12:54 PM bss36504: The anime is leaking into our IRC
12:55 PM Emil: Nooooo
12:55 PM Emil: I aint no weaaboo
01:00 PM leonardo_: You have been very helpful. Thank you and Goodnight!
01:17 PM LeoNerd: Random thought: has anyone had much luck sending WS2812 signals along a long (5 to 10m) cable in a stage environment? I'm suddenly wondering if I should use a pair of MAX481s
01:20 PM agaran: anyone knows if same can be done with C without inline asm? https://pastebin.com/dQFNCarG ?
01:21 PM NoHitWonder: LeoNerd have you done any DMX projects?
01:22 PM LeoNerd: Many
01:23 PM agaran: LeoNerd: imo first question you want to ask yourself is how much noise around you will have.. differential is simply more robust..
01:23 PM agaran: turned on/off big power devices.. each that makes spike via EMF..
01:24 PM LeoNerd: I'm expecting the vast majority of the noise to be the other PWM LED signals going down the same multicore cable
01:24 PM LeoNerd: So capacitive coupling
01:24 PM NoHitWonder: would it be possible to make somekind of midi controlled DMX controller, it would receive tempo from midi clock
01:24 PM LeoNerd: Many lighting desks will take MIDI input, yes
01:24 PM NoHitWonder: ok
01:24 PM NoHitWonder: cool
01:24 PM agaran: LeoNerd: then I'd go for differential signalling, because it at least deals with common mode signals..
01:25 PM * LeoNerd nod
01:25 PM agaran: not because it is must to have, but.. I like robust things..
01:25 PM LeoNerd: Ohquite
01:25 PM LeoNerd: I do have a box at the far end of my cable I can stick the MAX481s in so that will help
01:26 PM agaran: and if you plan connect/disconnect, i'd toss few diodes preventing killing receivers input..
01:27 PM LeoNerd: Hm?
01:27 PM agaran: diode from each differential line to vcc/gnd conducting if it goes above vcc or below gnd..
01:27 PM LeoNerd: What does that help against?
01:27 PM agaran: so if you happen to get crazy difference in potential it will burn diode first then burn your receiver
01:28 PM LeoNerd: Oh right; just like a regular antistatic protection on IC pins
01:28 PM agaran: usually ESD protection deals with that too so you can simply use anything that does ESD protections
01:28 PM LeoNerd: I believe the MAX usually has that
01:28 PM agaran: yep
01:29 PM agaran: well.. chip has protection for HBM, or charged device.. not for 'hey, lets plug THIS to other mains circuit to spread load'
01:29 PM agaran: and you may end up with ground difference more than you would like to see.. especially on stage stuff..
01:29 PM agaran: depends on purpose
01:29 PM LeoNerd: OHright.. So... the chip itself is only receiving power from the same cable as the signal
01:29 PM LeoNerd: The "remote" end of the box is not otherwise powered
01:29 PM agaran: but you have capacitors there?
01:29 PM agaran: ah, then it is safer
01:32 PM LeoNerd: Hmm.. Though I suspect I won't fit 2 channels of MAX481 driver, even with the tiny SOIC8 chips I have, *inside* the shell of a DB25 plug, will I?
01:32 PM LeoNerd: So perhaps I'll have to dedicate more IO pins on the plug for it
01:33 PM agaran: hmm, you can put them on oposite sides of board
01:36 PM LeoNerd: Yes but that still needs *a* board inside there ;)
01:36 PM LeoNerd: Whereas before it was just cabling
01:36 PM agaran: heh.. well some people are happy with dumb stuff, some want things be smart..
01:55 PM Tachyon` is now known as Tachaway
02:30 PM martinux is now known as martinus
02:40 PM Emil: agaran: explain what you mean by that code?
02:41 PM Emil: And sure you can send ws signals in 5-10m line, just need to make sure it's protected well enough
02:42 PM Emil: so low capacitance and inductance and shielding
02:43 PM agaran: Emil: I know what I did wrong, in form that I pasted it depends on -funroll-loops.. rewriting it
02:43 PM julius: hi guys
02:44 PM Emil: agaran: but please explain what it does
02:44 PM Emil: julius: hi
02:45 PM agaran: it is just 32bit addition,
02:45 PM Emil: LeoNerd: what do you mean by 5-10 meters of ws?
02:45 PM Emil: agaran: you are asking of the avr can do 32 bit addition?
02:45 PM Emil: of course it can
02:49 PM julius: still playing around with i2c, this totorial seems easy enough: http://exploreembedded.com/wiki/Real_Time_Clock%28DS1307%29_with_AVR but i dont have their board and i would like to transfer the date via bluetooth (bluetooth code works already)
02:51 PM Lambda_Aurigae: julius, play with this one http://homepage.hispeed.ch/peterfleury/avr-software.html
02:51 PM agaran: Emil: no, I already did it, I came here only it one could enlight me that I can do it without inline asm but seems inline asm is only good way.
02:51 PM Lambda_Aurigae: there is some i2c code on there that works...is old but it works.
02:52 PM julius: that was actually my first try, but the moisture sensor was broken....in the meantime i already switched sites
02:52 PM julius: ok, lets go back
02:53 PM Lambda_Aurigae: I've use fleury's code for talking with rtc chips, eeproms, and pcf8574 i2c port expanders.
02:53 PM julius: got a rtc module here
02:53 PM julius: do you still have the rtc code?
02:54 PM Lambda_Aurigae: right there on fleury's site.
02:55 PM julius: i see a lcd, a uart and a eeprom example....no rtc
02:55 PM julius: ah ok
02:55 PM julius: the eeprom is also a rtc demo
02:56 PM Lambda_Aurigae: I also combined the i2c and lcd libs to make an i2c connected 16x2 lcd module.
02:56 PM Lambda_Aurigae: using the pcf8574 chip.
02:57 PM Lambda_Aurigae: glub but I haven't used that code in years...might have to recreate it.
02:58 PM julius: nah, im gonna take a look right now
03:06 PM polprog: Emil: http://imgur.com/a/ZVNDI
03:06 PM polprog: :)
03:07 PM xentrac: look, a US$5 60Msps ADC: http://www.ti.com/lit/ds/symlink/adc08060.pdf
03:07 PM xentrac: will I be sad if I try to use a part like that?
03:09 PM julius: whats Msps?
03:10 PM xentrac: megasamples per second
03:11 PM Lambda_Aurigae: million samples per second
03:11 PM Lambda_Aurigae: xentrac, looks like a fun part.
03:11 PM xentrac: I'm just wondering if there's like a hidden disappointment or catch
03:11 PM Lambda_Aurigae: probably.
03:11 PM Lambda_Aurigae: it's only 8bit
03:11 PM Lambda_Aurigae: 8bit resolution that is.
03:12 PM xentrac: yeah, but 8 bits is still 48dB, isn't it?
03:24 PM agaran: xentrac: well you need something that can catch 80Mbit of data..
03:29 PM Lambda_Aurigae: at 60Msps, 8 bit parallel interface, you need to be able to grab 60 million 8bit numbers per second....I daresay that is faster than any atmega or attiny can handle.
03:29 PM LeoNerd: Emil: 5-10m of cable, carrying WS2812 signal
03:30 PM julius: xentrac, ah
03:36 PM agaran: Lambda_Aurigae: right, 60MB/s not 60Mbit..
03:36 PM Lambda_Aurigae: yup.
03:36 PM Lambda_Aurigae: in parallel!
03:37 PM julius: that seems a lot for such a little chip like a avr..
03:37 PM agaran: well parallel in this case is boon, you can toss it+sram+counters and make grabber.. but you need to do most of data shuffling in chips not in mcu..
03:37 PM Lambda_Aurigae: no atmega or attiny can do it julius
03:37 PM Lambda_Aurigae: they run at 20MHz...best collection of data would be 10MB/s doing 8bit parallel and doing nothing with the data.
03:39 PM agaran: even arm stuff ticked at 80+ MHz would have trouble to do anything but fetch data from such adc
03:39 PM agaran: and they do have DMA to offload some
03:40 PM Lambda_Aurigae: yup.
03:40 PM Lambda_Aurigae: you would need a 200MHz or better processor to capture and handle that data.
03:41 PM Lambda_Aurigae: that chip is something that would be used by a digital storage oscilloscope or something.
03:41 PM agaran: with good DMA you might do at bit less but.. getting data isn't all usually..
03:43 PM agaran: plus most mcus don't have lot of mem on chip..
03:43 PM Lambda_Aurigae: as I said, capture and handle..
03:44 PM specing: Time for fpga
03:44 PM agaran: and fpga is another level of problems too :)
03:44 PM specing: I find fpgas simpler than mcus
03:45 PM agaran: but there is no really open fpga nor toolset.. you need to get propertiary tools..
03:45 PM specing: there is
03:45 PM specing: lattice ice
03:45 PM xentrac: Lambda_Aurigae: yeah, a DSO is what I want
03:45 PM specing: and while you are making a DSO out of it xentrac
03:46 PM agaran: is it opensource OR just free?
03:46 PM specing: just make an ADC->system RAM bridge
03:46 PM Lambda_Aurigae: xentrac, so, you are going to need a fast ARM or a good fpga to take in and process and display that data.
03:46 PM specing: agaran: open source
03:46 PM xentrac: but ideally without an FPGA ;)
03:46 PM specing: xentrac: PCI-e card with ADC that feeds into system ram
03:46 PM agaran: interesting, last time I was googling for any toolkits there was free quartus but no opensource..
03:46 PM Lambda_Aurigae: you COULD feed the data from the ADC directly into parallel ram fairly simply just to capture data.
03:46 PM specing: xentrac: cheapest fpga with x4 pci-e is $40
03:47 PM agaran: specing: making reasonable board for such isn't eating a cake..
03:47 PM xentrac: agaran: check out IceStorm and yosys
03:47 PM specing: agaran: its 1mm pitch bga
03:47 PM agaran: sure, thanks
03:47 PM specing: and you can do it much cheaper if you ... ehm ... forget about standards :D
03:47 PM agaran: specing: still making reasonable board isn't eating a cake, 2 layer can be not possible.. 4 layer gets expensive.
03:47 PM specing: i.e. no impedance control and such fancy things
03:48 PM specing: agaran: expensive? a 5x5 board can't be more than $30 from china
03:48 PM agaran: but then you may get increased shutter jitter at ADC..
03:48 PM xentrac: yeah, if I can get the data into a RAM chip (or 8 of them) I can then process it in an AVR at my leisure
03:48 PM agaran: specing: 5x5 isn't enough to route bga+sdram+stuff imo..
03:48 PM Lambda_Aurigae: how fast do you want to capture data? 10Msps is doable with one of several microcontrollers.
03:48 PM specing: agaran: and you'll need to make a board anyway
03:48 PM specing: agaran: no sdram, just ADC and FPGA
03:49 PM specing: 1 pci-e lane would be enough for 60 MSPS 8-bit
03:49 PM agaran: well I know fpga has some sram on chip but.. DSO is fun when you can have some capture length..
03:49 PM specing: agaran: what do you think this inserts to?
03:50 PM specing: agaran: you have 64 gigabytes ram in your computer, might as well use it
03:50 PM agaran: you think about making card into noisy PC.. well
03:50 PM Lambda_Aurigae: that's what filtering is about.
03:50 PM specing: agaran: fine, you can make it an ExpressCard as well
03:50 PM specing: agaran: or de-noise your PC
03:50 PM xentrac: specing: you'll note that $40 is 10× what the ADC costs
03:50 PM Lambda_Aurigae: shields and rf cages and all that.
03:50 PM agaran: I don't have 64G in my pc..
03:50 PM specing: even miniPCI-e
03:50 PM specing: xentrac: such is life
03:51 PM agaran: Lambda_Aurigae: if shielding would be so easy then some stuff wouldn't cost that much..
03:51 PM Lambda_Aurigae: didn't say it was easy or cheap
03:51 PM Lambda_Aurigae: just doable.
03:51 PM specing: agaran: find, 16 gig then
03:51 PM Lambda_Aurigae: you get over 10MHz frequency range and you get into lots of trouble and cost usually.
03:51 PM specing: point is, you can load your PC up with much, much more and cheaper RAM than any DSO on the market
03:51 PM Lambda_Aurigae: 20MHz on a breadboard is pushing it hard really..
03:52 PM agaran: Lambda_Aurigae: well I did 100+MHz on breadboard/flywires but I couldn't call it 'stable' or 'predictable' really
03:52 PM Lambda_Aurigae: prezaktly.
03:52 PM Lambda_Aurigae: I do 20MHz regularly on breadboard and perfboard and homemade circuit boards.
03:53 PM Lambda_Aurigae: but beyond that I would go with shielding and such even if it wasn't going into a PC.
03:53 PM Lambda_Aurigae: so, you have a fast ADC..how fast do you want to capture the data? how much data do you want to capture?
03:54 PM agaran: yup, and how good sample'n'hold you can make, what BW of ADC driver you can do.. without self oscillating
03:54 PM xentrac: I'd be happy with 1000 samples at 40Msps
03:54 PM Lambda_Aurigae: with the 1Mbit serial sram chips from microchip you can capture at 20MHz easily without overclocking.
03:54 PM agaran: how stable jitter-wise you can make acquisition..
03:54 PM Lambda_Aurigae: look at the logic shrimp
03:54 PM agaran: Lambda_Aurigae: those chips aren't available anymore here..
03:54 PM Lambda_Aurigae: they actually overclock those chips to 40MHz and 60MHz.
03:55 PM Lambda_Aurigae: hmm..I just bought some 3 months ago.
03:55 PM Lambda_Aurigae: oh well.
03:55 PM agaran: maybe you get better suppliers than I can find :)
03:55 PM agaran: but still I'd rather go for 6ns sram..
03:55 PM Lambda_Aurigae: digikey is where I got them...again, 3 months ago.
03:56 PM Lambda_Aurigae: not too difficult to do it with dram.
03:56 PM xentrac: and presumably there are other such chips available
03:57 PM xentrac: whether sram or pseudo-sram
03:57 PM xentrac: like, I feel like 1000 samples of 8 bits depth is about what I can see on an oscilloscope screen anyway
03:57 PM agaran: Lambda_Aurigae: it is not difficult, it is more like issue with need to do refresh cycles, even during capture.. sram permits to skip that part at elevated power consumption..
03:57 PM xentrac: I know DSOs can do more than that so you can pinch and zoom the data after the capture but analog scopes can't
03:58 PM Lambda_Aurigae: elevated power and lower density.
03:58 PM agaran: xentrac: well tek did that in analog scopes, they put delay line in Y amplifier path while trigger was taken before amplifier, so you could see events -before- trigger
03:59 PM xentrac: yeah, I've seen scopes with analog delay lines
03:59 PM agaran: they put some semirigd coax loop in side of scope..
03:59 PM xentrac: but you still couldn't zoom in on the signal after the trace was already on the tube :)
03:59 PM agaran: not just delayline..
03:59 PM agaran: yes, for one-time events you can't
03:59 PM xentrac: that sounds like just a delay line to me
03:59 PM agaran: sure it was delay line just quite nice working one
04:00 PM xentrac: I thought about trying to use a coax delay line to extend the sampling rate of a slow ADC
04:00 PM xentrac: like this 6Msps one I found in a flatbed scanner
04:00 PM Lambda_Aurigae: I want a nice digital pulse mercury delay line...about 3 meters long.
04:01 PM xentrac: but I concluded that the coax would have to be so long that the attenuation and consequent SNR problems would be bestial
04:02 PM xentrac: I thought about trying to use a hard disk as an analog delay line in that way, and that might work, but I don't know enough about disks to know for sure. at the very least I'd have to correct harmonic distortion on the waveform
04:02 PM xentrac: record the analog waveform on a track of the disk and then digitize it over several rotations
04:03 PM xentrac: A guy selling high-speed scopes back in the early 1990s explained to me that they used a Williams tube as an analog memory in that way in their scope
04:03 PM xentrac: presumably that's still the case
04:05 PM agaran: not sure if they still use any magnetic storage, rotational speed of it would need be quite big
04:06 PM agaran: you need enough speed to have BW of interest available.. and head has finite parameters..
04:07 PM xentrac: they were using Williams tubes, not magnetic storage
04:08 PM xentrac: Williams tubes are random access
04:12 PM agaran: well my knowledge stopped about core memory, then jumped to early chips and srams/drams..
04:14 PM Lambda_Aurigae: how fast can you write to, say, an SD card?
04:14 PM Lambda_Aurigae: class10 can handle what, 80Mb/s?
04:14 PM Lambda_Aurigae: parallel them and you have some nice write speeds...just need to buffer it in some ram first.
04:18 PM agaran: Lambda_Aurigae: just calculate what clock you need to make 80Mb/s over SPI..
04:26 PM xentrac: Lambda_Aurigae: that's an average
04:26 PM xentrac: not a worst-case guarantee
04:27 PM xentrac: if I can buffer the data in RAM I'm done
04:40 PM julius: how do you get a uint8_t send via the urart if that thing only accepts chars? i was looking at iota, but the definition: http://www.nongnu.org/avr-libc/user-manual/group__avr__stdlib.html#gaa571de9e773dde59b0550a5ca4bd2f00 says to provide a char but it also says; ...the caller is responsible to provide sufficient storage...
04:40 PM julius: are they talking about a char array?
04:43 PM Lambda_Aurigae: a char type is the same as a unsigned 8bit integer.
04:43 PM Lambda_Aurigae: it is a number from 0 to 255
04:43 PM Lambda_Aurigae: or 0x00 to 0xFF
04:44 PM specing: no char is a signed 8bit integer
04:45 PM Lambda_Aurigae: since when?
04:45 PM Lambda_Aurigae: it's 8 bits...number from 0 to 255...ascii
04:45 PM xentrac: char can be signed or unsigned; the C standard doesn't specify
04:46 PM xentrac: it's signed in avr-gcc
04:46 PM xentrac: yes, this is stupid
04:47 PM xentrac: I think C compilers with signed chars started popping up in the 80s; I am pretty sure that the original C compilers had unsigned chars
04:47 PM Lambda_Aurigae: I always just treat them as char/uint8_t being interchangeable with a simple cast between them.
04:47 PM Lambda_Aurigae: the cast is just to keep the compiler from complaining.
04:48 PM julius: if u put a uint8_t i UDR i get a blank line, if i put a char in it the char is shown
04:50 PM xentrac: C doesn't require casts between typedef-equivalent types, not even to prevent compiler warnings, at least in any compiler I've seen
04:51 PM xentrac: If you can get warnings that way it's because your compiler's chars are signed
04:51 PM xentrac: and it does make a difference: (int)(signed char)128 is -128, while (int)(uint8_t)128 is 128 as it should be
04:52 PM Lambda_Aurigae: so I learnt something..hehe
04:53 PM xentrac: I can pay back a small amount of my debt to you thus :)
04:53 PM xentrac: (I'm not even 100% sure that (signed char)128 is guaranteed to be -128, because of the undefined signed overflow braindamage in the C standard, but I think that braindamage doesn't extend to overflowing casts)
04:53 PM julius: but wouldnt -128 be something different in ascii than 128?
04:53 PM Lambda_Aurigae: yeah...seeing things where char can be 16 or 32 bits to handle unicode crap.
04:56 PM julius: my bluetooth terminal shows the number when i put it into hex mode, as hex value
04:56 PM julius: why does it not display a simple uitn8_t?
04:58 PM xentrac: when char in C is more than 8 bits, it's not to handle unicode; it's to handle word-addressed machines like TI DSPs or Crays
05:00 PM xentrac: julius: I don't understand what is happening in your case
05:03 PM julius: the terminal is probably converting the received numbers to ascii chars
05:04 PM julius: and since 0 is dec 49 in the ascii table, it is probably not possible for the terminal to display much more besides a-z, 0-9
05:05 PM julius: well, for now the ascii output works
05:07 PM xentrac: you mean 48
05:07 PM xentrac: usually connections with things called "terminals" are sequences of 8-bit bytes; it's not physically possible for them to carry anything bout 0-255 (or -128 to 127 if you interpret them as signed)
05:10 PM Jartza: hallou
05:10 PM Lambda_Aurigae: morning Jartza
05:11 PM agaran: laters
05:11 PM Jartza: what's up?
05:11 PM julius: ok thsts not it, just sending letters doesnt solve it
05:16 PM xentrac: maybe you should have your lawyer send them
05:16 PM xentrac: sometimes that helps
05:16 PM Lambda_Aurigae: only if they are sent registered email.
05:16 PM Tom_L: let Bruno hand deliver it
05:17 PM xentrac: registering often helps with bugs involving asynchronous data, it's true, Lambda_Aurigae
05:18 PM Lambda_Aurigae: Registered ECC Email Delivery?
05:19 PM julius: hehe
05:19 PM julius: i bet the uart would be unimpressed ;)
05:19 PM Lambda_Aurigae: glub...I even have some 1GB registered ecc ram here.
05:20 PM Lambda_Aurigae: for a dual athlon MP 2000+ machine from around 2003 or so.
05:21 PM xentrac: nothing depreciats faster than gigabytes
05:22 PM Lambda_Aurigae: to a point
05:22 PM Lambda_Aurigae: at some point they are worth more than they originally sold for sometimes.
05:37 PM julius: i owned a dual athlon too at some point
05:37 PM Lambda_Aurigae: still do own and it still runs.
05:37 PM julius: nice
05:37 PM Lambda_Aurigae: although, so does my ibm xt with the 10MB hardcard and 8bit vga video card.
05:38 PM julius: just a few days ago a corei3 im using for routing lost one of its pci slots...the card just stopped working
05:39 PM Lambda_Aurigae: ISA for the win!
05:39 PM julius: could also be the pci card. but the point is, that thing isnt half as old as your athlon
05:39 PM julius: and falling apart
05:41 PM Lambda_Aurigae: they don't make em like they used to!
05:41 PM Lambda_Aurigae: my dual athlon is an MSI K7D Master motherboard...MSI makes good shit..or used to anyhow.
05:42 PM julius: they all jumped onto the trash train at some point, at least with the cheaper components
05:42 PM julius: anyway, im gonna wathc some "the other guys" and get to sleep
05:42 PM julius: good night
05:42 PM xentrac: Lambda_Aurigae: did you have trouble with hardcard stiction? or do you just not turn it off?
05:43 PM xentrac: I had a hardcard (20MB I think) in about 1990 and it started to not start up due to stiction
05:43 PM xentrac: Being a kid I learned I could fix the problem by rapping it with a hammer each day when I turned it on
05:43 PM xentrac: mysteriously it stopped working a few months later
05:44 PM Lambda_Aurigae: xentrac, once in a while I have...I fire the thing up once a year or so for the fun of it....just take it out and give it a shake if it sticks.
05:45 PM xentrac: That sounds more prudent than my approach
05:46 PM Lambda_Aurigae: there's a way to hold the drive with the bottom in your left hand,held in both hands...raise it to your forehead and flip it downward quickly...breaks the sticky loose.
05:47 PM Lambda_Aurigae: learnt that many many moons ago.
05:47 PM Lambda_Aurigae: back in the early 90s with mfm and rll drives
05:47 PM Lambda_Aurigae: and early seagate ide drives.
05:47 PM Lambda_Aurigae: this is a small mfm drive.
07:46 PM R0b0t1: Is there a list of USB interrupts for USB capable ATmega chips? I can't find them listed in the documentation for avr/interrupt.h
07:47 PM Lambda_Aurigae: you might check the datasheet maybe?
07:47 PM Lambda_Aurigae: it will have the entire interrupt table listed.
07:48 PM R0b0t1: Yeah I'm looking at the datasheet, all that is available are the named macros for manipulating the registers.
07:48 PM R0b0t1: Where is the interrupt table?
07:49 PM R0b0t1: Ah I found it
07:49 PM R0b0t1: Lambda_Aurigae: Well, I still don't have the macro names
07:50 PM R0b0t1: Do I need to look at avr/interrupts.h?
07:51 PM Lambda_Aurigae: what chip exactly?
07:51 PM R0b0t1: ATmega32u4
07:52 PM R0b0t1: http://www.atmel.com/Images/Atmel-7766-8-bit-AVR-ATmega16U4-32U4_Datasheet.pdf - section 9.1 has them all listed, but no ISR macro names
07:52 PM R0b0t1: I'm looking at interrupt.h. It seems to have no relevant information in it
07:57 PM Lambda_Aurigae: hmmm...
07:57 PM Lambda_Aurigae: there should be some extra usb software/libs....check the LUFA documentation.
08:06 PM R0b0t1: Yeah that's what I've had to do
08:06 PM R0b0t1: I found two USB interrupt handlers in the AVR8 directory
08:07 PM R0b0t1: and there's two, per the documentation
08:07 PM R0b0t1: I just have no idea where it's written down
08:08 PM Lambda_Aurigae: might not be.