#avr | Logs for 2017-01-02

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[02:01:21] <Emil> rue_house: mate pls
[02:03:09] <Emil> Also the ADC clock can run at 50-250 kHz to get around 10 bits.
[02:04:22] <Emil> And then you divide that by 13.5 for continuous sample
[02:06:11] <Emil> So what you can reliably have is 10k samples/second
[02:10:54] <rue_shop3> ? 10 bits is the adc limit
[02:11:09] <rue_shop3> not worried about samples/second on it, its a control signal
[02:11:43] <rue_shop3> BUT, it looks like the resolution of the interrupter for measuring rpm at barely high speeds sucks so bad I cant use it for regulation
[02:15:37] <rue_shop3> its not linear with speed, its the period, its log
[02:23:41] <rue_shop3> I'd not thought of that
[02:28:17] <rue_shop3> over the last 100rpm I have about 15 counts of resolution
[02:29:11] <rue_shop3> its almost linear at that point, so its a bit worse than 7 counts/rpm
[02:32:23] <SamVDB>
[02:47:44] <rue_shop3> https://www.youtube.com/watch?v=W4lsdi7a4Nw
[02:47:50] <rue_shop3> oh just reading text, but ok
[02:47:54] <rue_shop3> this makes sense
[05:47:27] <Sorunome> Hey, I am trying to initialize a SERCOM SPI interface on the arduino zero (SAMD21), however I don't seem to be able to get the commands for that right, and I can't seem to find docs on it. Because of <reasons> I can use neither the arduino stack nor ASF, so I need to do it by directly communicating with the SERCOM interface. Does anyone happen to know how to do this? Is this even the correct place to ask such a question?
[05:58:37] <Sorunome> I have the feeling that it is the initialization which is incorrect as my transfer code seems correct but never gets past weiting to be ready
[07:08:02] <carabia> Sorunome: enable the clock for the spi, config & enable the peripheral itself and you should be good to go
[07:08:28] <carabia> for more information, see rtfm
[07:08:54] <carabia> relevant registers will be found in the documentation of the chip
[07:09:40] <carabia> well, before enabling the peripheral you will also need to set the pinmodes accordingly
[07:13:49] <Sorunome> carabia: i have rtfm'd since a few days and i still can't get it to work
[07:14:45] <Sorunome> carabia: this is what I currently have: http://pastebin.com/QvX9S4aM it goes into a busy wait in spi_transfer on while(!BOOT_SPI_MODULE->SPI.INTFLAG.bit.DRE);
[07:14:48] <carabia> show some code
[07:17:31] <Sorunome> I PMUX them all to D because I am trying to initialize SERCOM4, still need to get that stuff into #define's, though
[07:18:23] <carabia> so yeah i can see spi settings and the pinmuxing, but is the clock enabled for the spi peripheral?
[07:18:43] <Sorunome> line 54+55
[07:19:03] <carabia> oh yeah, missed it
[07:19:08] <Sorunome> BOARD_GCLK_ID is set to GCLK_CLKCTRL_ID_SERCOM4_CORE
[07:22:30] <carabia> oh wait
[07:25:25] <carabia> i think i know what it is but let me double check
[07:25:42] <Sorunome> okay, thank you
[07:40:09] <carabia> hmm, probably isn't what i initially thought. however i can't see mux for the ss pin and on the other hand you're also not disabling the hw ss control of the peripheral?
[07:40:21] <carabia> or am i blind again? These pastebin colors kill my fucking eyes
[07:40:44] <Sorunome> i'm controlling SS over gpio......i thought that was OK?
[07:41:11] <carabia> read the ds whether the hw ss control of the peripheral is on by default or not
[07:41:28] <carabia> not sure if that's the culprit, though. but worth checking
[07:46:08] <Sorunome> well, i just added SERCOM_SPI_CTRLB_SSDE to SPI.CTRLB.reg and it still busy-waits on while(!BOOT_SPI_MODULE->SPI.INTFLAG.bit.DRE);
[07:47:42] <Sorunome> and i checked via an LED that SS is actually low
[07:47:56] <Sorunome> oh, i control SS outside of spi_transfer
[07:48:15] <carabia> yeah i got it
[07:49:21] <carabia> oh waaaait
[07:53:43] <carabia> seriously no wonder people stay away from the atmel arms cause the clock documentation for it is a clusterfuck
[07:53:52] <carabia> it unnecessarily complicates it
[07:57:58] <carabia> yeah, sorry i overlooked it. you haven't enabled the bus clock for the peripheral
[07:58:17] <Sorunome> uuuh, how do i do that?
[07:58:43] <carabia> read the ds on how to get the apb clock to the sercom module
[07:59:09] <carabia> i have no idea of the atmel arm register naming conventions, so
[08:00:04] <carabia> that's why this is a bit cryptic for me and gets easy to miss things
[08:02:46] <Sorunome> i thought i already do that: GCLK->CLKCTRL.reg = GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN | BOARD_GCLK_ID; where BOARD_GCLK_ID is GCLK_CLKCTRL_ID_SERCOM4_CORE
[08:02:53] <Sorunome> which binds that clock thing to SERCOM4
[08:03:11] <carabia> that's the core clock
[08:03:18] <carabia> 'you need the bus clock aswell
[08:03:52] <Sorunome> ah ok *starts reading stuff again*
[08:05:41] <carabia> it's either apb1 or apb2, depends which bus the selected peripheral uses
[08:08:24] <carabia> quick google says the clock toggle registers are in the "power manager" module
[08:08:35] <Sorunome> yeah just found that, thanks
[08:08:52] <carabia> well the bus clock toggle registers, anyway
[08:17:15] <Sorunome> ok, it seems to busy-wait on while(!BOOT_SPI_MODULE->SPI.INTFLAG.bit.TXC); now
[08:17:31] <carabia> progress
[08:17:31] <Sorunome> i added PM->APBCMASK.reg |= BOARD_PM_APB_ID; where #define BOARD_PM_APB_ID PM_APBCMASK_SERCOM4
[08:17:45] <carabia> that sounds about right
[08:19:50] <carabia> though
[08:19:59] <carabia> BOOT_SPI_MODULE->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_RXEN | SERCOM_SPI_CTRLB_CHSIZE(0);
[08:20:04] <carabia> should there be a TXEN?
[08:20:12] <carabia> aswell, that is
[08:20:59] <Sorunome> SPI doesn't have that, only UART and I2C for some reason. All the other people I saw don't use that there, either
[08:21:28] <carabia> alright
[08:27:21] <Sorunome> hm, the LED attached to the clock never lights up. That, or it is too quick/dim to see
[08:29:15] <Lambda_Aurigae> time for an oscope or logic analyzer.
[08:29:28] <Sorunome> i have neither lying around >.<
[08:33:44] <antto> at work i made myself a silly tool "signal analyzing beeper" it's a beeper which takes a logic signal.. it works for audible frequencies
[08:35:28] <carabia> hold on let me pull up the real ds
[08:36:10] <Lambda_Aurigae> antto, interesting.....I can see/hear potential there.
[08:37:04] <Lambda_Aurigae> frequency counter with a high and low range setting that beps if it picks up pulses within that range maybe? probably considerably more complex but sill doable.
[08:49:42] <carabia> Sorunome: oh yeah, have you enabled the clock for the gpio, too? *wink*
[08:49:53] <Sorunome> carabia: what do you mean by that?
[08:49:58] <Sorunome> pmux the thing?
[08:50:01] <carabia> no
[08:50:10] <carabia> you need to enable the clocks for the gpio ports you are using
[08:50:23] <Sorunome> i am only using GPIO for SS
[08:50:31] <carabia> no you don't understand
[08:50:34] <carabia> what port's the spi on?
[08:50:58] <carabia> E/O i take it?
[08:51:07] <Sorunome> PB11, PA12, PA10 they are all part of SERCOM4
[08:51:28] <carabia> then you need to enable clock for porta, portb, and whatever your SS is on
[08:52:15] <Lambda_Aurigae> gpio ports don't work without active clock on them...it's an ARM thing
[08:52:24] * Lambda_Aurigae learnt this by reading stm32 manuals last week.
[08:52:58] <carabia> st has better arm documentation than atmel, by a fucking longshot.
[08:53:19] <Lambda_Aurigae> I now have 3 stm32 chips to play with and lots of reading to do yet.
[08:53:36] <Lambda_Aurigae> found an older stm32 discovery board that I got,,,,several years ago,,,,and never used.
[08:53:43] <carabia> i'm accustomed to enabling clock registers automatically when i write something new so i overlooked this aspect :)
[08:54:01] <Sorunome> so I added PM->APBBMASK.reg |= PM_APBBMASK_PORT;
[08:54:05] <Sorunome> but still no luck D:
[08:54:29] <carabia> and what's pm_apbbmask_port defined as?
[08:54:45] <Sorunome> that's part of their thing
[08:54:53] <carabia> you need PORTA
[08:54:55] <carabia> PORTB
[08:55:01] <carabia> and whatever SS is on
[08:55:08] <Lambda_Aurigae> interestingly, this stm32 discovery board reads as 32K sram but the docs say only 16K.
[08:55:26] <carabia> i'm pretty sure they've got defines for individual ports, for power saving!
[08:55:44] <carabia> and that the reg has too. It's customary
[08:56:17] <carabia> unless that masks all ports... which would be weird
[08:56:50] <carabia> discos are great for the built-in st link
[08:57:00] <Sorunome> i checked all their #define's and cant find it D:
[08:57:14] <antto> Lambda_Aurigae yes, i used it before we bought a scope, it was still useful afterwards.. i probed UART, manchester, debug output pins..
[08:57:16] <carabia> hold on, getting a cup of coffee
[08:57:29] <Sorunome> blerg and mom calls me for lunch, brb
[08:57:34] <Sorunome> i'll read the backlog
[08:57:37] <antto> i could tell just by the sound if there was something wrong with the manchester from the rfid reader
[08:58:00] <antto> these signals have a distinct sound to them ;P~
[08:59:15] <carabia> your mom's gonna owe me a lunch for this one, too
[09:13:21] <carabia> the gpio doesn't necessarily need the apb clock as it seems to be fed with gclk0 by default. Whatever you have configured gclk0 to be, that is. The source and dividers
[09:14:40] <carabia> think the problem is in the pinmuxing
[09:17:11] <carabia> and for rue, yeah there is the internal iobus but stm32f1 ds specifies 18mhz gpio toggling rates through the high speed apb, so the point was still irrelevant
[09:23:03] <Sorunome> devider is set to 1
[09:23:17] <Sorunome> *divider
[09:23:32] <carabia> and the source?
[09:23:47] <Sorunome> you mean my init function?
[09:24:06] <carabia> well wherever you configure system clocks
[09:24:42] <Sorunome> PM->CPUSEL.reg = PM_CPUSEL_CPUDIV_DIV1;
[09:24:46] <Sorunome> seems to be 1, too
[09:25:45] <carabia> eh
[09:26:51] <carabia> that's the divider
[09:27:08] <carabia> in any case, i'm quite sure that's not the problem
[09:27:28] <Sorunome> what'cha mean then? Also, the normal bootloader still initializes the board
[09:27:44] <carabia> take a look at 23.8.11. (p. 426) in the d21 ds for proper muxing of the pins
[09:27:58] <carabia> cause your pin init seems somewhat... funky.
[09:28:45] <carabia> just double check
[09:30:59] <carabia> I think you'd need to write 1 to WRPMUX
[09:31:05] <Sorunome> oh, i don't set WRPMUX in any way
[09:31:19] <carabia> and WRPINCFG?
[09:31:36] <Sorunome> neither
[09:31:44] <carabia> yeah i'm thinking you should...
[09:32:08] <Sorunome> and neither PMUX, just PMUXEN >.>
[09:32:29] <Sorunome> in PMUX goes the port?
[09:34:42] <Sorunome> btw i got the pmux'ing from https://forum.arduino.cc/index.php?topic=360026.msg2772515#msg2772515
[09:34:57] <Sorunome> meh laundry brb this part of the day is stupid
[09:35:28] <carabia> and you need to mask the selected bits
[09:35:47] <carabia> in the low 2 bytes
[09:36:12] <Sorunome> i thought as i use .bit.PMUXEN i don't need to?
[09:37:54] <Sorunome> or what do you mean?
[09:38:11] <carabia> well i'm not aware of what the fuck the structs are
[09:38:37] <carabia> i'm really reluctant to find out, also
[09:39:02] <Sorunome> ok, fair enough
[09:39:56] <carabia> i just know that, with that register you can set the pins
[09:40:10] <interrobangd> hello
[09:41:03] <carabia> and the hwsel bit determines whether it's the upper or lower 16 bits of the port
[09:41:12] <interrobangd> i want to "self programm" and take the example ASM from page 196: http://www.atmel.com/Images/Atmel-42505-8-bit-AVR-Microcontrollers-ATtiny102-ATtiny104_Datasheet.pdf
[09:41:52] <interrobangd> i get something like ""constant value required"" <- any idea?
[09:42:46] <interrobangd> ok page is fault if PDF is not correct loaded
[09:42:55] <interrobangd> the point is "20.5.
[09:42:55] <interrobangd> Self programming"
[09:45:46] <interrobangd> have somebody a minute? its about ASM and AVR ;-)
[09:46:08] <carabia> Sorunome: though I guess your way should work, too
[09:46:21] <Sorunome> carabia: yeah that is what i found online
[09:46:51] <Sorunome> interrobangd: page 196 doesn't have an example
[09:47:11] <interrobangd> Sorunome, you have to download the pdf and open with adobe reader
[09:47:30] <carabia> Sorunome: though it doesn't add up
[09:47:33] <interrobangd> firefox and pdfjs dont work until all pdf pages are loaded
[09:48:25] <Sorunome> interrobangd: i'm not on windows, and it doesn't show up in okular
[09:48:44] <carabia> Sorunome: could you quickly reference the pin table for me
[09:48:47] <Sorunome> carabia: yeah.....at least i got the clock power now working...
[09:49:05] <Sorunome> oh i just do rightlick -> "goto implementation" in atmel studio
[09:49:29] <interrobangd> Sorunome, The point in the Navigation is "20.5.
[09:49:29] <interrobangd> Self programming"
[09:50:17] <carabia> Sorunome: no i meant the ds... well i'll pull it up myself
[09:51:28] <Sorunome> interrobangd: yeah you need to define "temp" to some temporary register
[09:51:41] <carabia> Sorunome: the ds kind of "implies" that the pincfg register should be set before you set the mux function
[09:51:54] <interrobangd> how to do it?
[09:52:07] <carabia> so you could try that, it's what is being done in the example too, Sorunome
[09:53:56] <Sorunome> carabia: so you mean http://pastebin.com/ExFf7itY ? That still yields the same result
[09:54:24] <Sorunome> oh wait i could do that per-pin hang on
[09:54:26] <carabia> hmh, yeah that's waht i meant
[09:54:33] <carabia> shouldn't matter per-pin, I think.
[09:54:38] <Sorunome> because if the pins are on the same port it would be weird
[09:55:23] <Sorunome> nope, still the same
[09:55:25] <Sorunome> :(
[09:56:09] <Sorunome> interrobangd: just substitute "temp" with a register which is free in your piece of code and can ldi
[09:57:17] <interrobangd> i.e. "ldi temp, r16"?
[09:57:41] <carabia> Sorunome: i think you have PMUXO/E backwards
[09:57:42] <Sorunome> naaaaah, ldi r16, 0b011000 \ out NVMCMD, r16
[09:58:01] <Sorunome> carabia: if there is a reminder then it is odd, though......
[09:58:05] <Sorunome> it's worth a shot, i guess
[09:58:06] <carabia> E is for even, O is for odd, yeah? Now you're testing pin % 2 for odd
[09:58:18] <carabia> oh wait ahah, yeah
[09:58:26] <carabia> you're right
[09:58:43] <carabia> logic's starting to fail me
[09:58:52] <Sorunome> carabia: and i set to it which SERCOM thing i use, so if it is SERCOM4, SERCOM0 etc. right?
[09:59:02] <Sorunome> eeer wait no
[09:59:10] <Sorunome> i set to it if i use A / B / C / D etc.
[09:59:25] <Sorunome> based on that PMUX table *looks in open tabs*
[09:59:32] <carabia> Sorunome: yes
[09:59:49] <carabia> the corresponding function group can be found in the pin table of the DS
[10:00:02] <carabia> A/B/C/D/E/whatever
[10:00:19] <interrobangd> Sorunome, some lines after are also a call to "temp", should i do also just change temp to r16?
[10:00:49] <Sorunome> interrobangd: yeah, they use "temp" for a temporary register which you don't use elsewhere. You could also define the name "temp" as r16 or something, though that might break other code
[10:00:51] <carabia> Sorunome: what were the spi pins again?
[10:01:12] <Sorunome> MOSI: PB10
[10:01:16] <Sorunome> MISO: PA12
[10:01:22] <Sorunome> SCK: PB11
[10:02:02] <Sorunome> and "D" is 3, right? because A is zero and stuff....
[10:02:42] <carabia> the table is at p.31
[10:02:46] <carabia> and yeah it should be function grp D
[10:03:01] <interrobangd> Sorunome, nice, but a new error apears: "undefined reference to "CCP""
[10:03:03] <Sorunome> yeah i'm looking at it right now to triple-check my #define's
[10:03:23] <interrobangd> itss the "Configuration Change Protection Register"
[10:04:10] <Sorunome> interrobangd: i never did a lot of avr asm, so I don't remember if there was some nice include file that jsut defines a bunch of commands for you. You could look into that
[10:04:24] <interrobangd> i did it
[10:04:53] <carabia> Sorunome: yeah to check the DIPO/DOPO
[10:05:06] <interrobangd> but don´t find anything or any example how to implement ASM in AVR toolchain
[10:05:28] <carabia> well, DOPO I guess as it seems to change SCK pin
[10:05:40] <carabia> dipo seems not to affect it
[10:05:59] <Sorunome> omg the SCK pad was 1 instead of 3
[10:06:19] <Sorunome> let's see if it's working now
[10:06:34] <Sorunome> interrobangd: i only did inline-asm in c++, sorry :/
[10:06:53] <interrobangd> inline-asm ... what the hell is that?
[10:07:07] <Sorunome> carabia: still seems to yield the same results o.O D:
[10:07:19] <Sorunome> interrobangd: embedding a few asm snippets into c or c++ code
[10:07:29] <carabia> :|
[10:08:38] <Sorunome> carabia: is there maybe something i need to disable or so before the ports allow PMUX'ing?
[10:09:18] <carabia> no i don't think so...
[10:09:49] <interrobangd> Sorunome, yep, that is what i do
[10:10:04] <interrobangd> Sorunome, you anderstand the short statement?
[10:10:39] <interrobangd> is that only for erase a word inside flash or erase and flash a new word?
[10:10:52] <interrobangd> i am not sure
[10:11:56] <Sorunome> interrobangd: i'm not too familiar with the hardware but the simple thing is "out CCP, R19" just outputs the contents of R19 to port CCP. To know what that does you need to read the datasheet. The comments appear as if R19 is some kind of flash control port and that way you enter some mode to allow to re-program it
[10:13:13] <Sorunome> carabia: do i maybe have to set the pins to GPIO input/output before pmux'ing them?
[10:13:41] <carabia> Sorunome: can you check the definition of PORT_PMUX_PMUXE_D?
[10:15:53] <Sorunome> 3
[10:16:13] <interrobangd> Sorunome, ok - thanks!
[10:16:18] <Sorunome> carabia: it's 3
[10:16:25] <carabia> sure
[10:16:33] <carabia> um something doesn't add up here
[10:16:50] <carabia> look at the pmuxo/e table for function groups
[10:16:59] <Sorunome> perhaps the clock is too high?
[10:17:15] <carabia> no
[10:17:21] <carabia> well, could be but no. just humor me
[10:17:38] <carabia> actually no, nevermind.
[10:17:39] <Sorunome> it's connected to an adafruit sd breakbout board
[10:19:24] <Sorunome> what do you mean with <carabia> look at the pmuxo/e table for function groups ?
[10:19:57] <Sorunome> PMUX uses 4 bits for a pin and thus it uses the lower 4 bits for the even pin numbers and the upper 4 bits for the odd ones
[10:20:29] <carabia> yeah no the other table. but it wasn't the problem
[10:23:39] <ribalda> Hi, Is this the right channel for avr-libc ?
[10:24:00] <Emil> ribalda: sure-ish
[10:24:49] <ribalda> I think that I might have found a bug at avr/wdt.h
[10:25:17] <Emil> Let us hear it
[10:25:58] <ribalda> it does not work fine for atxmega. wdt_enable should say (timeout+1) << 2
[10:26:08] <ribalda> https://github.com/vancegroup-mirrors/avr-libc/blob/06cc6ff5e6120b36f1b246871728addee58d3f87/avr-libc/include/avr/wdt.h#L166
[10:26:22] <ribalda> also xmegas support 4s and 8s
[10:26:40] <ribalda> http://www.atmel.com/Images/Atmel-8331-8-and-16-bit-AVR-Microcontroller-XMEGA-AU_Manual.pdf
[10:26:45] <ribalda> where can I send a patch?
[10:29:55] <carabia> Sorunome: oh wait, by the way
[10:30:12] <carabia> SSDE is not the bit to disable the hw ss control
[10:30:16] <carabia> it's MSSEN
[10:31:04] <carabia> ssde is used for wakeup when the device functions in slave mode
[10:31:09] <Sorunome> EN sounds like enable.....i'll try anyways ^.^
[10:31:09] <Emil> ribalda: the gnu savannah page has the email lists
[10:31:22] <carabia> it's master slave select enable
[10:31:31] <carabia> this boils down to me being unfamiliar with these register names
[10:31:50] <carabia> Bit 13 – MSSEN: Master Slave Select Enable - This bit enables hardware slave select (SS) control.
[10:31:59] <Emil> ribalda: there might even have been an issue tracker
[10:32:25] <Sorunome> carabia: i have software slave select, though
[10:32:42] <carabia> exactly, you don't want the sercom module trying to control the ss by itself
[10:32:55] <carabia> that's what the bit does, but i'm not sure if it's enabled by default or not.
[10:33:35] <Sorunome> is the order of pmux / setting CTRLA/CTRLB SERCOM registers important?
[10:33:39] <carabia> but i'm not sure if your problems are caused by this
[10:34:34] <carabia> i'm not sure of that, but don't think they are until you enable or start using them at the very latest
[10:34:42] <Sorunome> adding that flag still yields the same results :(
[10:34:51] <Sorunome> do i need to wait for PMUX synchronization?
[10:37:00] <ribalda> Emil: Thanks!
[10:37:16] <Sorunome> carabia: perhaps I should post about this on some forum?
[10:38:29] <carabia> Sorunome: perhaps. the ds doesn't mention anything on waits after setting mux config
[10:38:43] <carabia> or then they are hidden away :)
[10:39:15] <Sorunome> OK, i'll post on a forum. Thanks a LOT for your help and time!
[10:42:28] <carabia> in ctrla there's the additional setting of "frame format" but i think it defaults to spi
[10:43:04] <carabia> a scope/la would be really helpful. An la will cost you $5 or something :)
[10:43:24] <Sorunome> what is an la?
[10:43:53] <carabia> logic analyzer
[10:44:30] <Sorunome> i have/use a debugger thing where i can pause and step through and stuff. And change registries, flags and stuff
[10:44:37] <Sorunome> i don't even want to know how that dark magic is working
[10:44:58] <carabia> i know, your board probably has the debugger built into it
[10:45:18] <carabia> but that doesn't help
[10:45:35] <carabia> the la would help to see whether anything is actually coming off the spi bus
[10:46:15] <carabia> the saleae software (available on win, osx, linux I think) is super easy to use, and the la itself has a usb i/f to pc
[10:46:15] <Sorunome> ah i see
[10:46:27] <Sorunome> i have a few spare arduino nanos? :P
[10:46:36] <carabia> the saleae clones sold on ebay are either 8 or 16 chan
[10:47:04] <carabia> i don't know what the hell is arduino nano
[10:47:16] <Sorunome> some atmel avr board
[10:47:23] <carabia> okay.
[10:47:53] <carabia> usb with avrs is wrong. unless it's 32u2/4/??, and even then it's still wrong
[10:49:18] <Sorunome> anyhow, i'll post now on the ofrums. Thanks a lot anyways :)
[10:49:22] <carabia> you could still try setting the frame format in the ctrla register as a last ditch effort
[10:49:47] <carabia> but i guess it defaults to spi
[10:50:32] <Sorunome> eeeeer, frame?
[10:50:35] <Sorunome> do you mean form?
[10:50:39] <Sorunome> frame form format?
[10:50:45] <Sorunome> * frame format
[10:51:04] <Sorunome> that's 16 different possibilities....on it!
[10:51:20] <carabia> yes
[10:51:46] <carabia> SPI should be 0x00, and i think the ds shows that's the default
[10:51:49] <carabia> but, i could be wrong
[10:58:22] <carabia> and just to clarify, you should set MSSEN to 0
[11:01:02] <Sorunome> well, as i do BOOT_SPI_MODULE->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_RXEN | SERCOM_SPI_CTRLB_CHSIZE(0);
[11:01:14] <Sorunome> adding | MSSEN thing would set that bit to 1 and otherwise it is zero
[11:01:28] <Sorunome> as i overwrite all the control bits
[11:01:54] <carabia> well set it before you enable the thing
[11:02:10] <carabia> maybe mssen is 0 by default too, though. ds will tell you.
[11:03:26] <Sorunome> I'm posting now >.>
[11:03:47] <Sorunome> i think community.atmel.com is the right place
[11:27:51] <carabia> Sorunome: I checked the post. I don't think you need to enable the apb clock to PORT
[11:28:20] <carabia> PM->APBCSEL.reg = PM_APBCSEL_APBCDIV_DIV1_Val; This should be done most likely in some kind of a system clock init, so you could remove that
[11:29:13] <carabia> and the sercom apb clock should be enabled before enabling the module itself, AFAIK
[11:30:29] <Sorunome> the module isn't enabled until the vbery last line, so that should be fine?
[11:30:45] <Sorunome> And that devider is indeed set in the board init, i just put it there to, well, make sure
[11:31:33] <carabia> i think it doesn't make any difference. on the contrary it might fuck things up cause it's attempting to change the apb bus prescaler, as far as i know
[11:31:48] <carabia> unless you need to flip a bit in some register for it to actually take effect
[11:34:28] <carabia> and yeah indeed the module is only enabled on the last line so it seems. I'm not familiar of the exact order in which to enable clocks, I simply enable them all before touching any peripherals cause I like my shit nice and simple
[11:34:30] <Sorunome> removing PM->APBCMASK.reg |= BOARD_PM_APB_ID; already makes it busy-wait on the DRE check
[11:34:59] <carabia> you should not remove it, that enables the bus clock to the module
[11:35:05] <carabia> just move it to the top, or something.
[11:35:28] <Sorunome> before the PMUX?
[11:35:48] <carabia> just... before everything. keep it simple. doesn't hurt a thing.
[11:36:22] <Sorunome> holy shit that acutally made it work o.O O.o :o
[11:36:24] <carabia> i don't think it needs that to access the registers, but i don't exactly know the innards of the peripheral systems
[11:36:42] <carabia> apparently it needed it to access the config regs
[11:36:50] <carabia> hooray.
[11:37:46] <Sorunome> okay now to fixing the mmc implementation :P
[11:38:00] <carabia> figured it would only need it to access the data/interrupt regs, but no. Never encountered this issue as, like i said, i enable all the clocks pre-configurating anything.
[11:38:26] <carabia> as should you.
[11:39:08] <Sorunome> this is literetally the first time i'm doing this kind of stuff, lol.
[11:39:33] <Sorunome> already did quite some z80 asm in the past, and some C/C++ stuff, but then not that low-level C/C++
[11:40:29] <carabia> another note on using sd cards, as pretty much all the sd cards sold nowadays are sdhc
[11:41:05] <carabia> a lot of examples online show the init sequence for the old sd cards. SDHC requires an additional command to be sent before you can bring it up from the idle state
[11:41:28] <carabia> iirc it was cmd8, which was basically sending a pattern with a checksum and the card replies back with the pattern
[11:41:52] <carabia> also, during the init sequence you have to keep the bus clock at max 400 kHz
[11:42:06] <Sorunome> i'm basically using their example here: http://elm-chan.org/fsw/ff/00index_e.html
[11:42:12] <Sorunome> and it works for bitbanging with my card
[11:42:30] <carabia> well then it's probably legit.
[11:42:37] <Sorunome> yeah, it also uses CMD8 stuff
[11:42:47] <Sorunome> uuuh, how do i modify the bus speed?
[11:43:01] <carabia> you reset the baudrate
[11:43:07] <carabia> re-set, eben
[11:43:09] <carabia> even
[11:43:21] <Sorunome> ok, thanks
[11:43:55] <carabia> check ds on whether you have to check something or if the module is good to go after re-setting it
[11:46:22] <carabia> there was also this
[11:46:24] <carabia> http://atmel.force.com/support/articles/en_US/FAQ/SPI-max-clock-frequency-in-SAMD-SAMR-devices
[11:46:42] <carabia> because apparently atmel can't even make arms.
[11:47:09] <carabia> not sure if that's applicable to your chip. forgot which it was.
[11:47:25] <Sorunome> SAMD21
[11:47:41] <Sorunome> do you happen to know what exactly the 60 means? if not, i'll do the digging, no worries BOOT_SPI_MODULE->SPI.BAUD.reg = SERCOM_SPI_BAUD_BAUD(60);
[11:49:02] <carabia> no idea. check the macro.
[11:49:22] <Sorunome> ok
[11:50:56] <Sorunome> again, thanks a LOT for your patience!
[11:51:12] <carabia> alright. i'm gonna go grab a bite. laters.
[11:51:20] <Sorunome> not a bit? :P
[11:51:32] <Sorunome> or, well, a byte would do, too
[12:39:58] <Lambda_Aurigae> just a nibble or two
[12:41:10] <carabia> yeah. really just a nibble or two. i'm going through a very sickening cold that renders me nigh useless. apparently it's the result of spending all christmas and new year's out of town in a very drafty place out in the countryside
[12:42:02] <Lambda_Aurigae> eating a big salad here.
[12:42:21] <carabia> where i come from, we let bunnies eat the salad.
[12:42:25] <carabia> real men eat red meat.
[12:42:30] <Lambda_Aurigae> that's for supper.
[12:42:34] <Lambda_Aurigae> porterhouse steak.
[12:42:39] <carabia> that's more like it.
[12:42:42] <Lambda_Aurigae> will even make really frenchyfries.
[12:42:47] <Lambda_Aurigae> deep fried!
[12:45:23] <carabia> ways back there was some controversy (can't remember was it due to creutzfeld-jakob) about t-bone/phouse steaks here
[12:46:00] <carabia> i can't remember seeing them in regular markets in ages. But perhaps bigger ones still sell them.
[12:46:57] <Lambda_Aurigae> all the stores with real meat cutters have them here.
[12:47:02] <Lambda_Aurigae> always one or the other
[12:47:04] <Lambda_Aurigae> sometimes both.
[12:47:15] <Lambda_Aurigae> difference is in the size of the tender side.
[12:47:26] <carabia> i'm worlds apart from 'murica
[12:47:52] <Lambda_Aurigae> we do have good food here.
[12:48:11] <carabia> once DT gets rid of the us sand nigras, i have to consider moving in!
[12:48:13] <Lambda_Aurigae> lot more controls on our food than most countries too.
[12:48:20] <Lambda_Aurigae> DT?
[12:48:42] <carabia> that's, President, Donald Trump.
[12:48:49] <Lambda_Aurigae> oh.
[12:48:55] <carabia> well, president-elect technically still.
[12:49:10] <Lambda_Aurigae> Don Trump....sounds like a mafia boss.
[12:49:42] <carabia> well, hopefully he'll make the muslim population an offer they simply cannot refuse
[12:49:51] <carabia> here's hoping!
[12:49:57] <Sorunome> wtf the compiler is modifying my code
[12:50:00] <Sorunome> well, the functionality of it
[12:50:12] <carabia> optimization called is that.
[12:50:16] <Lambda_Aurigae> I got no more problem with muslims than I do christians.
[12:50:26] <Sorunome> well, optimization shouldn't change behaviour. And this does
[12:50:28] <Lambda_Aurigae> less really
[12:50:37] <carabia> Sorunome: it might
[12:50:54] <Lambda_Aurigae> optimization can do some really stupid things sometimes.
[12:50:57] <carabia> Lambda_Aurigae: isn't that just peachy.
[12:51:20] <Lambda_Aurigae> carabia, yup.
[12:51:27] <Sorunome> https://ghostbin.com/paste/3777u
[12:51:28] <carabia> i'll leave it at that
[12:51:32] <Sorunome> n is defined elsewhere as uint8_t
[12:51:49] <Sorunome> and upon the first loop iteration the diss-assembly doesn't have the if-condition in it whatsoever
[12:53:09] <carabia> hmmhmm
[12:53:38] <Sorunome> i guess i'll have to overgo the smart compiler :P
[12:54:02] <carabia> i think that kinda defeats the purpose of do...while
[12:54:24] <Sorunome> you mean what the compiler is doing or what i am doing?
[12:54:30] <Sorunome> it used to be } while ((d & 0x80) && --n);
[12:54:37] <Sorunome> but that didn't work so i tried that solution
[12:54:54] <carabia> do { d = spi_read_byte(); } while(--n && (d & 0x80) == 0);
[12:55:10] <Sorunome> you mean != 0
[12:55:22] <carabia> see
[12:55:25] <carabia> logic has left me today
[12:55:36] <Sorunome> also
[12:55:42] <Sorunome> that would be bad, because of order of operations
[12:55:49] <Sorunome> eeeer nvm only bad on last iteration
[12:56:00] <carabia> you can swap them
[12:56:18] <Sorunome> yeah but if the first one returns false then n isn't decremented :P
[12:56:44] <carabia> true
[12:58:16] <carabia> well, no idea why the if gets optimized away. logic is really not my strong suit today
[12:59:28] <carabia> you could probably circumvent it by declaring d as volatile
[12:59:58] <Sorunome> if d is zero then } while ((d & 0x80) && --n); should exit the loop, right?
[13:00:17] <Sorunome> i already have d declared as volatile......else i couldn't view its value at all in the debugger due to being optimized out
[13:00:39] <carabia> yes
[13:00:57] <Sorunome> idea
[13:02:08] <Sorunome> nope, while (((d = spi_read_byte()) & 0x80) && --n); didn't do it either. But seriously though, on the first cycle d is zero o.o
[13:03:09] <carabia> what does it do exactly
[13:03:25] <Sorunome> it's part of the mmc implementation which doesn't work, apparently because of that thing
[13:03:36] <carabia> i mean the behaviour of the code
[13:03:41] <Sorunome> if d & 0x80 is zero that means that the executed command was successful
[13:04:03] <carabia> so it keeps looping?
[13:04:20] <Sorunome> yeah. It checks d & 0x80 on every iteration except the first one
[13:09:05] <Sorunome> in which world is 0 & 0x80 equal to 32
[13:10:45] <carabia> d probably is not 0 then
[13:10:54] <Sorunome> the debugger says it is, though
[13:11:13] <carabia> some funky shit going on
[13:11:20] <Sorunome> indeed ._.
[13:13:55] <carabia> i need a smoke. nothing better to cure a sore throat than a cig.
[13:19:43] <carabia> kinda hard to argue against gdb
[13:20:21] <Sorunome> the dis-assembly is just twice the spi_read_byte() without checking the condition in between....
[13:27:06] <toddpratt> are the A chips always more power efficient versions?
[13:27:17] <toddpratt> (atmega8a, attiny13a)
[13:30:45] <Lambda_Aurigae> newer core
[13:31:09] <Lambda_Aurigae> more power efficient and some other small changes.
[13:32:02] <rue_house> .
[13:32:37] <rue_house> digital simulation of RC circuit:
[13:33:11] <rue_house> while (v < 4.99){
[13:33:12] <rue_house> i = (5-v)/r;
[13:33:12] <rue_house> q += i*t;
[13:33:12] <rue_house> v = q/c; printf("%f\n", v);
[13:33:12] <rue_house> }
[13:33:26] <rue_house> RC charge, where the supply voltage is 5
[13:33:58] <rue_house> v is capacitor voltage, i is current, r is the charge resistor, q is the capacitor charge, t is a constant time slice
[13:34:12] <rue_house> to discharge:
[13:34:27] <rue_house> while (v > 0.001){
[13:34:28] <rue_house> i = -v/r;
[13:34:28] <rue_house> q += i*t;
[13:34:28] <rue_house> v = q/c; printf("%f\n", v);
[13:34:28] <rue_house> }
[13:34:33] <carabia> okay then
[13:34:48] <rue_house> now, it can be simplified, r and t are constants
[13:36:01] <carabia> there are plenty rc calculators online that do the same
[13:36:23] <rue_house> so, in the charge case: q += ((5-v)/r)*t aka ((5-v)/r)*(t/1) aka ((5-v)/1)*(t/r)
[13:36:35] <carabia> but disregarding pastebins in favor of irc code line per line is always an amusing sight
[13:36:47] <rue_house> where t/r is a constant for this purpose
[13:37:10] <rue_house> BUT if you want to simulate an RC constant on an avr for doing something like filtering, this is all good
[13:38:05] <rue_house> furthermore, if we simpify by setting c to 1; in the charge case we go from v = q/c to v=q, which means all the v's can be q's
[13:39:02] <rue_house> { q = (5-q)*K1; printf("%f\n", q); }
[13:40:31] <rue_house> discharge would look like { q += -q*K1; printf("%f\n", q); }
[13:40:44] <Lambda_Aurigae> looks like a cuss word or three to me.
[13:40:46] <carabia> sometimes discharge can be white, too.
[13:41:47] <carabia> as a matter of fact discharges can come in all kinds of colors and varying degrees of viscosity
[13:41:56] <rue_house> so, using that, implement a charge pumped simulated frequency to voltage converter!
[13:42:31] <rue_house> integer based of course
[13:44:32] <rue_house> prove why q *= 0.75; is results in the same curve as q += -q*K1;
[13:45:29] <rue_house> I suppose q += -q*K1 is the same as q -= q*K1
[13:46:18] <carabia> personally i have had occasions of semi-viscous, approx. white discharge happen, often involves pumping action with increasing frequency over time
[13:46:29] <carabia> YMMV.
[13:47:05] <rue_house> quit screwing around!, this is Sereos
[13:47:28] <Lambda_Aurigae> or is that Cereals?
[13:47:55] <rue_house> how can it be the same curve if the one has a subtract in it?
[13:48:48] <rue_house> q *= 0.75 -> q = q * 0.75 vs q = q - q * K1
[13:50:44] <rue_house> in the right case, the amount subtracted every time is less
[13:55:55] <rue_house> aha
[13:56:19] <rue_house> q = q - q * K1 -> q * (1-K1)
[13:56:30] <rue_house> so the difference of 0.75 and K1 is 1
[13:57:19] <rue_house> so, you CAN simplify to q * K2
[14:03:50] <rue_house> straaaange
[14:04:20] <rue_house> for charging, this works out to q = q *(1-K1) + (5*K1); and for ej... discharge it works out to q = q * (1-K1);
[14:04:42] <carabia> i remember watching this show called house
[14:05:04] <rue_house> house was a good show, you should watch it
[14:05:16] <carabia> in it, there was this doctor who did "differential diagnosis" with his... subordinates
[14:05:27] <carabia> this kind of reminds me of that, except no-one else is talking
[14:06:01] <rue_house> what confuses the hell outa me, is that the charge just adds 5*K1 to the normal discharge calc
[14:06:28] <rue_house> yea, apparently I'm on a level of my own
[14:06:41] <rue_house> so, sometimes, I'm the only one to talk to about what I'm working on
[14:07:02] <carabia> this doesn't have to involve textual output on irc
[14:07:14] <carabia> like, we're working here
[14:07:28] <rue_house> sure it does, if nobody answers it proves I know more
[14:07:42] <rue_house> there was no active conversation, I checked
[14:07:59] <rue_house> besides,
[14:08:34] <rue_house> I have a dot!
[14:08:50] rue_house changed topic of #avr to: 8 bit atmel microcontrollers, and maybe __other stuff__. http://tom-itx.no-ip.biz:81/~webpage/index.php
[14:09:02] <carabia> rue_house: is my makefile prize in the mail already?
[14:09:20] <rue_house> yes, prizes were shipped out to all the winners
[14:09:38] <carabia> that translates to: all to me
[14:09:51] <rue_house> and, in this particular case, all entrants won!
[14:10:12] <antto> anyone familiar with falstad/circuit? any idea how to overcome this problem: the opamp doesn't have power supply pins exposed and i'm trying to use it inside a floating voltage (after a bridge rectifier)
[14:10:42] <rue_house> ... RF op-amp?
[14:10:51] <rue_house> you have to inject the power in the output
[14:10:52] <rue_house> iirc
[14:12:07] <antto> it's an opamp used in the context of buffering the virtual ground
[14:12:23] <antto> so it's used sort of as a buffer/comparator
[14:12:30] <rue_house> so, from all this, I can conclude that a capacitor is ALWAYS discharging
[14:12:53] <rue_house> voltage follower
[14:13:19] <rue_house> produced by a voltage leader, that usualy implements a voltage divider
[14:13:34] <rue_house> cause leaders divide and conquer
[14:15:35] <antto> there's an "opamp" example circuit in falstad which resembles the internals of an opamp made out of transistors and what not.. i guess that's my only option.. but that's kinda huge
[14:16:06] <antto> i wonder if there is a simpler way to "simulate" an opamp roughly with sepparate components
[14:18:44] <rue_house> oooh, you mea you dont ahve a power supply for the op-amp?
[14:18:54] <rue_house> what are you trying to do
[14:19:14] <rue_house> maybe just ask how to solve the overall problem instead of how to fix what you have narrowoed it down to
[14:19:55] <rue_house> while your at it, write a 2 digit document that desribes the meaning of life, the universe, and everything.
[14:21:13] <rue_house> so, this means that a capacitor charges by getting rid of an amount of charge that balances with the amount of charge comming in
[14:21:15] <rue_house> WTF
[14:21:49] <antto> the opamp model in falstad doesn't have the power pins exposed, instead, there's a configuration dialog where you can set for example +15 and -15V .. but then THAT voltage is taken as absolute and relative to falstad's GND symbol
[14:22:06] <antto> but in my circuit, i have a bridge rectifier, where the voltage is floating
[14:22:37] <antto> if i put a ground symbol on it - i am pretty sure this ground symbol causes side effects in the circuit
[14:23:08] <rue_house> which means that the proper forula for discharge is not q *= K2, but q *= K2; q += 0*K1;
[14:23:34] <antto> if i don't (which is correct) then the voltage of the rails floats, and the opamp starts to push it away untill it hits -15V for example, where it stops pushing
[14:23:51] <rue_house> I dont see an image yet
[14:24:05] <rue_house> based on the number of thigns i'm doing right now you need to feed me an image
[14:26:03] <antto> http://i.imgur.com/tZMOtTZ.png
[14:26:47] <rue_house> you feed the op-amp off the two rails
[14:27:08] <antto> yes, except - i can't
[14:27:13] <rue_house> you will need a high voltage amp
[14:27:19] <rue_house> why cant you?
[14:27:45] <antto> the opamp model doesn't allow that
[14:28:10] <rue_house> soluuton is definitly to use a real op-amp
[14:28:18] * rue_house ahnds antto a breadbaord
[14:28:26] <antto> it draws power from hard-coded voltage levels (which i can chage) but practically it's as if it draws power from a non-floating power rail
[14:29:06] <rue_house> use a center tapped transformer
[14:29:33] <rue_house> aka, from ground a ac supply of half the votlage you have there, with one end on ground
[14:29:56] <rue_house> realize that modeled things only work in modelers
[15:03:02] <rue_house> so, I can now implement RC timing on an avr
[15:17:54] <Emil> antto: ehM
[15:17:55] <Emil> ?
[15:18:14] <Emil> you can place the gnd symbol with the bridge recrifier before the last diode
[15:18:21] <Emil> works without issues
[15:18:48] <antto> where exactly?
[16:00:14] <Emil> antto: just place it before the negative side diode on the dc side
[16:01:00] <antto> on the bottom rail?
[16:01:51] <Emil> yes
[16:02:14] <Emil> Just place it where you want your gnd reference to be
[16:02:18] <antto> then i can see current flowing from/into it
[16:02:25] <Emil> You shouldnt
[16:02:37] <Emil> At least I dont see such
[16:02:50] <Emil> Unless you have multiple grounds at different potentials
[16:03:28] <antto> i realized this opamp model just won't work for the circuit i'm trying to simulate
[16:03:50] <antto> since the opamp i need there *needs* to be supplied from the power rails
[16:39:10] <interrobangd> any example how to write to Atmel AVR flash ("self programming") in C? My Attiny has no bootloader and i am not able to write ASM
[16:39:46] <interrobangd> .. a few ASM examples are in the Attiny manual... but i dont understand :-G
[16:39:48] <Lambda_Aurigae> interrobangd, have you read the datasheet?
[16:39:54] <carabia> Lambda_Aurigae: i doubt it
[16:40:06] <interrobangd> Lambda_Aurigae, always open
[16:40:28] <interrobangd> the whole day... no success :(
[16:40:38] <Lambda_Aurigae> there is a section on self programming.
[16:40:53] <carabia> datasheets are much alike medication. They do jack shit unless you actively use them
[16:40:57] <interrobangd> http://www.atmel.com/Images/Atmel-42505-8-bit-AVR-Microcontrollers-ATtiny102-ATtiny104_Datasheet.pdf
[16:41:01] <carabia> unfortunately it's not enough to have it open.
[16:41:10] <Lambda_Aurigae> it will describe the commands needed to write to flash.
[16:41:25] <Lambda_Aurigae> and the prerequisites like number of bytes per flash page and all.
[16:41:34] <Lambda_Aurigae> also, you have to erase the page before writing to it.
[16:42:05] <Lambda_Aurigae> you can't just write one byte at a time without erasing the byte first..and you have to erase a whole page at a time, not just one page.
[16:43:12] <Lambda_Aurigae> http://www.atmel.com/Images/Atmel-2575-C-Functions-for-Reading-and-Writing-to-Flash-Memory_ApplicationNote_AVR106.pdf
[16:43:13] <interrobangd> the page(s) are erased (0xFF...)
[16:43:14] <Lambda_Aurigae> read that one.
[16:43:25] <Lambda_Aurigae> detailed instructions.
[16:43:58] <interrobangd> BOOTLOADER required
[16:44:24] <interrobangd> i have not this section in my tiny104
[16:45:12] <Lambda_Aurigae> http://www.atmel.com/Images/doc1644.pdf
[16:45:17] <Lambda_Aurigae> also, read this.
[16:45:43] <Lambda_Aurigae> what chip are you using?
[16:45:58] <interrobangd> http://www.atmel.com/Images/Atmel-42505-8-bit-AVR-Microcontrollers-ATtiny102-ATtiny104_Datasheet.pdf
[16:46:02] <interrobangd> Tiny104
[16:47:26] <interrobangd> that was my last try http://pastebin.com/zLAXE9y4
[16:47:53] <interrobangd> i did it like in Atmel-42505-8-bit-AVR-Microcontrollers-ATtiny102-ATtiny104_Datasheet.pdf on page 196 descibed
[16:48:21] <interrobangd> *page 193, "20.4.3.3. Writing a Code Word"
[16:50:30] <interrobangd> AVR109 -also based on Bootloader
[16:50:36] <Lambda_Aurigae> yes.
[16:50:53] <Lambda_Aurigae> looking at your chip, it's different from anything I worked with.
[16:51:17] <Lambda_Aurigae> I would have to read the entire self-programming section to understand it.
[16:51:24] <Lambda_Aurigae> I don't do much with attiny chips.
[16:51:43] <interrobangd> nothing new today :)
[16:52:02] <interrobangd> nobody has worked with Tiny ;)
[16:52:18] <interrobangd> but it shout be able
[16:52:26] <Lambda_Aurigae> looks like you have to use the TPI interface
[16:52:50] <interrobangd> noooooo
[16:53:04] <interrobangd> its not able to self programming
[16:53:07] <interrobangd> by TPI
[16:53:19] <Lambda_Aurigae> I would have to do a lot more reading.
[16:53:22] <interrobangd> because TPI make reset pin low
[16:53:27] <Lambda_Aurigae> but that's the only way I see to write to the main flash.
[16:53:41] <Lambda_Aurigae> I think there's an internal TPI programming interface.
[16:53:42] <interrobangd> no no!
[16:53:46] <interrobangd> no.
[16:54:51] <interrobangd> See "20.5. Self programming" and "20.4.3.3. Writing a Code Word" - its def. possible
[16:54:51] <Lambda_Aurigae> you are on the way with it.
[16:55:03] <Lambda_Aurigae> NVMCMD is the interface for it.
[16:55:06] <Lambda_Aurigae> part of it anyhow.
[16:55:15] <Lambda_Aurigae> that's code word
[16:55:23] <Lambda_Aurigae> different section from program flash.
[16:55:27] <interrobangd> NVMCMD is part of it, right.
[16:56:21] <interrobangd> you see, i did config it http://pastebin.com/zLAXE9y4
[16:57:19] <Lambda_Aurigae> page 194
[16:57:26] <Lambda_Aurigae> has assembly commands to do it.
[16:57:26] <interrobangd> yes i see
[16:57:30] <interrobangd> i know
[16:57:40] <Lambda_Aurigae> you just need to convert that to C
[16:57:43] <interrobangd> that is was i say
[16:57:51] <interrobangd> yes.
[16:57:56] <interrobangd> thats my problem!!!
[16:58:01] <interrobangd> you see: http://pastebin.com/zLAXE9y4
[16:58:17] <interrobangd> i cant unterstand ASM :-G
[16:58:37] <Lambda_Aurigae> have you bothered to read the avr instruction set document?
[16:58:45] <Lambda_Aurigae> explains the assembly commands, in detail.
[16:58:50] <interrobangd> omg
[16:58:56] <interrobangd> no
[16:59:03] <interrobangd> i cant
[17:00:03] <interrobangd> the first i did is to look for solutions in c that maybe already existing. Else: i go to hell
[17:00:27] <interrobangd> ASM is to much
[17:01:45] <Lambda_Aurigae> maybe someone else is willing to read and interpret for you.
[17:01:54] <Lambda_Aurigae> I'm not up to teaching assembly tonight.
[17:01:59] <interrobangd> even no avr-gcc lib for self-programming on attiny existing, i would have to write my own makro
[17:02:13] <Lambda_Aurigae> macro
[17:02:16] <Lambda_Aurigae> no clue what a makro is
[17:02:23] <interrobangd> Lambda_Aurigae, dont do is its ok Sir
[17:09:58] <interrobangd> .. not very well described: "Write the low byte of the data into the low byte of a (!) word location"
[17:10:31] <interrobangd> haha
[17:11:08] <interrobangd> well, i did it and dont work like expected
[17:11:24] <interrobangd> huhu
[17:11:51] <Lambda_Aurigae> you are missing steps.
[17:12:09] <Lambda_Aurigae> you wrote the NVMCMD
[17:12:14] <interrobangd> which one?
[17:12:22] <Lambda_Aurigae> where is writing the CCP?
[17:12:34] <interrobangd> dont seen?
[17:12:38] <interrobangd> http://pastebin.com/zLAXE9y4
[17:12:44] <interrobangd> line 10
[17:12:50] <Lambda_Aurigae> out of order.
[17:13:15] <Lambda_Aurigae> look at the assembly program snippet....it's not that hard to read..
[17:13:17] <interrobangd> i to it first, then can i write on NVMCMD register
[17:13:44] <interrobangd> do you have a page number or title?
[17:13:49] <Lambda_Aurigae> set ccp
[17:13:52] <interrobangd> ah
[17:13:55] <Lambda_Aurigae> write the Z register
[17:13:59] <Lambda_Aurigae> set nvmcmd
[17:14:01] <Lambda_Aurigae> set ccp
[17:14:02] <carabia> Lambda_Aurigae: tell me, why do people bother with doing nonsense such as this?
[17:14:28] <interrobangd> carabia, i am sorry for boring you
[17:14:35] <carabia> you should be
[17:14:39] <Lambda_Aurigae> then the final trigger.
[17:14:43] <Lambda_Aurigae> carabia, no clue.
[17:14:50] <Lambda_Aurigae> why do people try to run before learning to crawl?
[17:14:59] <interrobangd> carabia, we can go skyding ok?
[17:15:07] <Lambda_Aurigae> interrobangd, been there, done that.
[17:15:08] <carabia> skyding, k
[17:15:13] <interrobangd> skydiving ololooo
[17:15:19] <carabia> Lambda_Aurigae: yes exactly
[17:15:19] <Lambda_Aurigae> jumping out of perfectly good airplanes is fun.
[17:15:33] <interrobangd> he is bored
[17:15:35] <Lambda_Aurigae> but, I took a class.
[17:15:45] <Lambda_Aurigae> learned what I was doing before I jumped.
[17:16:11] <interrobangd> fien
[17:16:14] <interrobangd> *fine
[17:17:01] <Lambda_Aurigae> self programming on an attiny is a bit much for me to read and learn in one night without having the chip to work with here.
[17:17:05] <Lambda_Aurigae> and I don't have any.
[17:17:07] <carabia> balance yourself, pull the string? if it fails, pull the other string. it if fails, die?
[17:17:21] <carabia> while instructor sets the failsafe trigger for you
[17:17:30] <carabia> damn, was probably an expensive class
[17:17:37] <Lambda_Aurigae> don't pull the harness release.
[17:17:52] <Lambda_Aurigae> I did it in australia.
[17:17:57] <carabia> that's probably a good one, too, though. Did that teaching cost you extra?
[17:18:16] <Lambda_Aurigae> just before our first solo jump they played this video
[17:18:19] <interrobangd> no, if you do it not alone, you tandem master do it. I am Skydiver
[17:18:21] <Lambda_Aurigae> was a helmet cam.
[17:18:28] <Lambda_Aurigae> the guy had a throat mike.
[17:18:29] <interrobangd> not just 1 oder 100 times
[17:18:46] <carabia> oh. jawohl. lebensraum für übermenschen
[17:18:49] <Lambda_Aurigae> he jumped and started talking about how he lost his job and his girlfriend and his dog died.
[17:19:04] <Lambda_Aurigae> as he was cutting loose his chute.
[17:19:15] <Lambda_Aurigae> running commentary all the way into the ground.
[17:19:30] <carabia> go him.
[17:19:36] <Lambda_Aurigae> then the instructor asks the class, "Anybody lose their job, their girlfriend, or their dog in the last year?"
[17:20:18] <interrobangd> it is a show, he talking all about risk and life and so on
[17:20:35] <carabia> that cam's probably pretty good if it survived the hit
[17:20:43] <Lambda_Aurigae> it didn't survive.
[17:20:52] <Lambda_Aurigae> they had to reconstruct the VHS tape.
[17:21:18] <carabia> a lot of trouble for some random faggot.
[17:21:47] <Lambda_Aurigae> typical aussie humor if you ask me.
[17:21:57] <carabia> the instructional value of said video is probably little to none
[17:22:10] <Lambda_Aurigae> probably.
[17:22:18] <Lambda_Aurigae> but I found it funny.
[17:22:40] <carabia> i'm torn between pathetic and funny. perhaps a bit of both
[17:22:41] <interrobangd> it is!
[17:23:26] <interrobangd> skydiving is more safe then base jumping :P
[17:23:33] <carabia> no shit?
[17:24:02] <carabia> Lambda_Aurigae: you know, he had room to improve however
[17:24:13] <Lambda_Aurigae> always room to improve.
[17:24:19] <carabia> in order to be funnier, that is
[17:24:46] <carabia> if he would have pre-cut your shoots, too, all the attendants
[17:24:56] <Lambda_Aurigae> yeah, not
[17:24:56] <carabia> that shit would've been a real killer
[17:25:20] <carabia> in more ways than one
[17:25:58] <Lambda_Aurigae> I prefer my parachutes intact.
[17:26:02] <carabia> or well, not yours actually. but the attendants of the jump at the time of making the video
[17:26:28] <carabia> he should've been mid-air going through his suicide plan and before hitting the ground telling the rest that they're fucked, too
[17:26:31] <interrobangd> Lambda_Aurigae, its important how to read the Z Pointer? High or Low Byte first?
[17:26:38] <interrobangd> or just for writing?
[17:27:47] <Lambda_Aurigae> reading shouldn't matter.
[17:27:57] <Lambda_Aurigae> but I would always go low then high myself.
[17:31:37] <interrobangd> it dont think it will change anything if i write NVMCMD or CCP first
[17:32:16] <interrobangd> because all the following will act within 4 clock cylces
[17:34:37] <interrobangd> nope -nothing
[17:35:12] <Lambda_Aurigae> there are TWO writes to CCP
[17:36:39] <interrobangd> ive seen
[17:36:56] <interrobangd> ive changed http://pastebin.com/CFw4iEHF
[17:37:43] <interrobangd> maybe writing H befor L -Byte? hmmm
[17:37:54] <interrobangd> i am confused sry
[17:41:06] <Lambda_Aurigae> again, I'm back to you need to learn assembly to understand how it's doing it.
[17:41:19] <Lambda_Aurigae> and you will have to use assembly most likely.
[17:41:33] <Lambda_Aurigae> because there is a very tight timing required in there.
[17:41:44] <Lambda_Aurigae> which I doubt C will be able to do properly.
[17:42:00] <Lambda_Aurigae> there are also two NOP commands required after the ST
[17:43:25] <Lambda_Aurigae> neither of which you have in your program.
[17:59:17] <interrobangd> geschrieben wird nichts, das bestätigt mit der check mit folgendem registerabgleich: NVMCSR & (1<<NVMBSY)
[17:59:56] <interrobangd> deutsch ok?
[18:00:27] <cehteh> not really
[18:00:36] <interrobangd> np
[18:00:52] <cehteh> i am german too, but many here are not
[18:00:55] <interrobangd> will talk again in high grade english
[18:01:02] <interrobangd> ;)
[18:47:53] <Chillum> high grade english, good good
[20:46:48] <interrobangd> yip
[23:31:25] <rue_house> if ( cli() around a sensitive peice of code, will I get pending interrupts when I sei()?
[23:34:03] <Casper> I didn't tested, but afaik, yes
[23:36:33] <rue_house> whats the pin change interrupt handler called for a tiny13?