#avr | Logs for 2016-11-22

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[03:53:45] <Emil> Hmm
[03:53:50] <Emil> I should learn assembly
[03:54:30] <Emil> Hmm, I could write an assembly interpreter for avr ":D"
[04:07:37] <cehteh> wtf
[04:43:54] <skz81> Emil, you mean a ... Simulator ? Yet another one ?
[04:49:36] <Emil> skz81: No. An assembly interpreter. You give data through some communication channel and the avr interprets it
[04:49:45] <Emil> 1 to 16 ratio should be easily achievable
[04:50:20] <Emil> Fixed size stack and heap
[04:58:48] <cehteh> i doubt that, there is certainly some devil in the details
[04:59:26] <cehteh> i bet the code will somewhat bloated for what it can do
[05:00:40] <cehteh> some limited assembly like machine might be possible, few registers, stack pointer, handfull instructions
[05:01:09] <Emil> It would be a fun project to try out stuff
[05:01:18] <Emil> Not an actual production thing, pls
[05:01:37] <cehteh> i'd rather like to have something useful
[05:01:44] <Emil> It is useful
[05:01:48] <cehteh> have to try one of the forth implementations for avr
[05:01:53] <gjm> No oke, a czemu nie mógł wejść? xD
[05:01:59] <gjm> ffuuuuuuu
[05:02:01] <Emil> gjm: probably the wrong window
[05:02:03] <cehteh> or maybe doing what i saied above someday
[05:02:08] <gjm> Emil: Yes.
[07:32:39] <Lambda_Aurigae> I think there is a 6502 assembly interpreter for the AVR already.
[07:33:53] <Lambda_Aurigae> https://www.usebox.net/jjm/dan64/
[09:40:06] <rue_house> I wonder if an appleIIe can be overclocked without screwing up the video
[09:40:34] <rue_house> reasons to turn my appleIIe on:
[10:34:13] <DKordic> Emil: HOw about a bootloader?
[11:39:14] <Emil> DKordic: ?
[11:39:37] <Emil> No, the issue is not about building a program
[11:39:40] <Emil> it is about learning
[11:58:16] <Lambda_Aurigae> rue_house, not likely.
[11:58:36] <Lambda_Aurigae> rue_house, I think the video chip runs from the main cpu clock.
[12:42:03] <Emil> Hmm
[12:42:09] <Emil> https://emil.fi/jako/scap.c
[12:42:21] <Emil> anyone have an idea why it doesn't seem to work
[12:42:28] <Emil> I'm trying to do one pin capacitive sensing
[12:42:37] <aandrew> yes
[12:42:46] <aandrew> there isn't a single comment in that code
[12:42:53] <Emil> It does work intermittadly
[12:43:01] <LeoNerd> Not *necessarily* a bad sign, but generally an indicator ;)
[12:43:15] <Lambda_Aurigae> could be a hardware issue there Emil
[12:43:17] <Emil> intermittenly*
[12:43:55] <daey> looking at the prices of sd cards. why do microcontroller have so little space available? 1Mb shouldnt even cost 10cents. or is the memory technology vastly different (transistor size etc.) that it would require a different production method all together making it significantly more expensive?
[12:44:16] <Lambda_Aurigae> daey, it's the interface to the memory really.
[12:44:34] <Lambda_Aurigae> and AVR chips are kinda limited...at least atmega and attiny...on bus width.
[12:44:45] <Lambda_Aurigae> 64K words or 128K bytes are about the max limit.
[12:45:15] <Emil> It does detect when I touch it but even if I don't let go it stops reporting touch
[12:45:47] <daey> that still doesnt explain why there are 1kb chips. why dont they equip them all with the max possible memory? it wouldnt affect the cost (looking at sd cards./usbsticks)
[12:46:02] <Emil> Because they would have to change the manufacturing
[12:46:06] <Emil> redesign the chips
[12:46:11] <Lambda_Aurigae> daey, it's all in the chip design.
[12:46:20] <Lambda_Aurigae> and, yes, flash memory is cheap really.
[12:46:29] <daey> so the design comes from a time where the memory was expensive?
[12:46:32] <Lambda_Aurigae> there are other considerations on the different chips though.
[12:46:32] <daey> when*
[12:46:39] <Emil> yes
[12:46:41] <Lambda_Aurigae> pretty much.
[12:46:43] <daey> i see
[12:46:53] <Lambda_Aurigae> they put limited number of address bus lines in the chip cores.
[12:47:29] <Lambda_Aurigae> there are some pic chips,,,mostly pic32,,,that can use spi flash or ram chips for main memory expansion though.
[12:47:32] <daey> iirc the atmega88 has a bigger clone that only differs in memory
[12:47:43] <Lambda_Aurigae> yes..atmega168
[12:47:46] <Lambda_Aurigae> atmega328
[12:47:53] <daey> yes thats the one
[12:47:57] <Lambda_Aurigae> same chip with more memory.
[12:48:10] <Lambda_Aurigae> for the atmega chip, I go with atmega1284p myself...
[12:48:42] <Lambda_Aurigae> there are some chips with 256K bytes of flash too...they added a magic way to access more than the 8bit bus will normally allow.
[12:49:58] <daey> now i wonder if they even produce atmega88s or if they are all 328s :D
[12:50:11] <Lambda_Aurigae> no clue on that one.
[12:50:20] <Lambda_Aurigae> like the 486dx vs 486sx line..
[12:50:26] <daey> they do charge considerably more for the 328 though
[12:50:33] <Lambda_Aurigae> the 486sx was a 486dx with the math-coprocessor disabled..
[12:50:58] <Lambda_Aurigae> they made 486dx chips then tested the hell out of the mathco...if the mathco failed they pulsed a fuse that disabled the mathco.
[12:51:20] <Lambda_Aurigae> one production line, two outputs.
[12:51:27] <daey> same with the <2010 AMD 3core cpus
[12:51:48] <Lambda_Aurigae> many chips are done like that.
[12:51:54] <Lambda_Aurigae> disable the failed parts.
[12:51:59] <Lambda_Aurigae> a lot of GPUs are like that.
[12:52:23] <Lambda_Aurigae> and modern flash modules do similar on the fly.
[12:52:55] <Lambda_Aurigae> wear leveling and onboard testing....report a set amount, provide said amount to the system...if a block fails testing while in use, disable it and enable another block.
[12:53:15] <Lambda_Aurigae> that is not done on avr microcontrollers...or any 8bit microcontrollers far as I know.
[12:57:53] <Emil> There
[12:57:57] <Emil> https://emil.fi/jako/scap.c
[12:57:59] <Emil> Commented
[12:59:52] <Emil> Annoingly the version with two pins works just fine
[13:00:28] <Lambda_Aurigae> you using the qtouch lib?
[13:00:32] <Emil> No
[13:00:34] <Lambda_Aurigae> or the qtouch hardware?
[13:00:39] <Emil> Qtouch is software only
[13:00:43] <Lambda_Aurigae> oh
[13:00:51] <Lambda_Aurigae> then the onboard touch hardware?
[13:01:05] <Emil> Lambda_Aurigae: the atmegas do not have any touch hardware :D
[13:01:14] <Lambda_Aurigae> ummm.
[13:01:14] <Emil> It works by charging the pin capacitance
[13:01:29] <Emil> And timing when the interrupt detects positive edge
[13:01:34] <daey> i found the error
[13:01:49] <daey> main has no return. even though its int
[13:01:54] * daey *runs*
[13:01:57] <Emil> sigh
[13:02:16] <Lambda_Aurigae> yeah...guess it's pic that has that.
[13:02:33] <Emil> Lambda_Aurigae: yeah, pic is god tier on touch, my friend went on and on about how awesome they are with it :D
[13:02:43] <Lambda_Aurigae> never used it myself.
[13:02:54] <Emil> daey: happy?
[13:03:06] <daey> :3
[13:03:29] <Lambda_Aurigae> I thought the whole touch system was very picky about physical layout though.
[13:46:35] <Emil> https://emil.fi/jako/ccap.c
[13:46:45] <Emil> Here's a version if you prefer the god awful definitions
[13:46:50] <Emil> binary is so much more readable
[15:22:12] <Emil> Why. The fuck. Are my interrupts triggering even if I clear the flag and clear the bloody masks
[15:22:51] <daey> sei n oder nicht sein das ist hier die frage :)
[15:23:24] <Emil> daey: ?
[15:23:53] <daey> Emil: https://www.youtube.com/watch?v=KQnozHl2_kA
[15:26:20] <Casper> Emil: which flag? the "enable interrupt for X" or "there is an interrupt for X" ?
[15:35:31] <Emil> Casper: I'm clearing both EIFR=(1<<INTF0) and TIFR1=(1<<TOV1) and the relevant masks EIMSK=0 and TIMSK1=0
[15:35:59] <Emil> Possibilities are a) Logic error and b) fucking gcc
[15:44:05] <Casper> or c) misread something in the datasheet
[15:44:33] <Casper> which interrupt get triggered? tov1?
[15:48:05] <Emil> No no
[15:48:11] <Emil> I do get data out
[15:48:13] <Emil> It just works badly
[20:06:25] <hetii> Hello :)
[20:08:31] <hetii> So today I order 6x T5540 cause I thought can run kodi on it, but at the end of the day I realize that they don`t have video hardware codec to do that, so any idea what I can build from them ? :)
[22:39:44] <Levitator> Excuse me homies, but are there any guesses as to what would cause PCINT2_vect to be called constantly when the only enabled PCINT pin is being driven high?
[22:40:46] <Levitator> I could understand if it were floating and receiving interference, but it's not.
[22:46:40] <Levitator> Oh, duh. Forgetting to shift PCINTX to obtain a mask will result in an active floating input. Duh.
[22:53:59] <cehteh> :D
[23:10:00] <jsoft> Already up to 800 bytes of memory used for cw parsing code :/
[23:11:52] <Levitator> Why do you need to parse cusswords?
[23:12:02] <jsoft> morse code
[23:13:08] <Levitator> I program entirely in machine code by crossing two wires at 1bps because I'm a purist.
[23:13:09] <jsoft> It interprets the high / low transistions, stores them in a linked list, then ( have not written yet ) takes averages of times high/low, turns into a dit/dah stream, then turns it into a character from a morse code tree