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[04:29:14] <grog> ive got a datalogger that's mostly sleeping (sensor/tx cycle every 4hrs) but needs to count RPMs of a windmill, typically 0-120 with a max of like 200 before it flies apart heh
[04:29:22] <grog> right now im using a simple interrupt to increment a counter
[04:30:21] <grog> can someone point me to some decent docs on using a timer to do this instead? like, does that even make sense?
[04:33:50] <dunz0r> grog: Depends on how much accuracy you want I guess.
[04:34:41] <dunz0r> grog: You mean like wake up with a timer or measure in timed intervals?
[04:36:03] <grog> i was thinking of using a 16-bit timer to count pulses from my RPM meter, recording the value every 5mins and resetting to 0
[04:36:23] <ThatDamnRanga> I'm guessing using an interval between ticks to count RPM based on a single revolution
[04:37:04] <grog> but the async timer on my 1284p is only 8-bit? so my low-power sleepytime wouldnt work?
[04:37:53] <ThatDamnRanga> if it's turning slowly
[04:37:59] <ThatDamnRanga> you're better off using an RTC
[04:38:12] <ThatDamnRanga> and when the interrupt fires, wake up, check the time, go to sleep
[04:38:23] <ThatDamnRanga> average over 5min if that's waht you want to do
[04:38:30] <ThatDamnRanga> and write to wherever you're trying to write to
[04:39:06] <grog> the interrupt might never fire as the windmill may be stopped
[04:39:11] <grog> i need a dead-on pulse count every 5mins
[04:39:33] <ThatDamnRanga> the onboard timer won't be counting up to 5 minutes any time soon
[04:39:50] <grog> 200rpm max, 1" diameter wheel with magnet, i forget the math but it's slow :)
[04:41:34] <grog> so im firing the rtc overflow every second and the counter every 0-1sec and it can sleep in between?
[04:44:25] <ThatDamnRanga> there's a million ways to cut this cake
[04:44:39] <ThatDamnRanga> all of them just as tasty (or not, if you prefer)
[04:44:52] <grog> sure seems that way, just trying to save a bit of juice
[04:45:39] <grog> or rather, understand a few of the pros/cons and pick one that's a good balance of ease and power..
[04:46:38] <ThatDamnRanga> the fewer clock cycles you need to expend, and the less often you need to wake up, the more power saved
[04:46:41] <ThatDamnRanga> though in all honesty
[04:46:50] <ThatDamnRanga> the way you're going you'll make a button cell last a decade
[04:47:52] <grog> nah, every 4hrs the rest wakes up and pulls 200-700mA for nearly 7mins ;)
[04:49:17] <ThatDamnRanga> sounds inefficient
[04:50:29] <grog> you dont know what 'the rest' does ?
[04:50:59] <ThatDamnRanga> nope
[04:51:16] <ThatDamnRanga> but it's too little current to be anything significant, and too much to be anything efficient
[04:51:39] <grog> heats some gas sensors, takes some readings, sends an SMS
[04:51:57] <grog> eventually it'll trigger some solenoids and more sensors
[04:55:10] <grog> alright so if async timer2 is only 8-bit i'd need to check it once per minute
[04:55:29] <grog> watchdog timer runs all the time, i could get that to fire every 8sec-ish
[04:55:41] <grog> tada, sleepytime most of the time
[04:58:06] <grog> so instead of 1 to 4 interrupts per second (rtc and rpm's) im down to 1 every 8sec?
[04:59:24] <grog> i guess then it becomes a question of clock cycles for the operations
[05:00:13] <ThatDamnRanga> try and think in assembly
[05:00:33] <ThatDamnRanga> i.e. which approach will be the best in terms of operations
[09:39:34] <rue_house> its funny to see what looks like the 10 pin isp port making a comeback
[09:59:02] <LeoNerd> Ooh?
[11:12:20] <carabia> 10 pin avr isp? the extra 4 pins are useless am i not correct?
[11:12:38] <specing> more like the extra 6
[11:13:16] <specing> ok, 4 with ground and power
[11:13:58] <carabia> well you don't need vcc but you do need gnd anyway
[11:44:48] <gjm> Look at the pinout…
[11:45:15] <specing> ain't nobody have time for that
[11:59:08] <carabia> gjm: gee wiz thanks.
[11:59:18] <carabia> Never thought of that myself really
[12:38:57] <bss36504> Why is/would the 10-pin come back?
[12:53:25] <Lambda_Aurigae> I have serial port on the extra pins.
[12:53:35] <Lambda_Aurigae> use 2 of the pins for tx and tx.
[12:53:41] <LeoNerd> Not a bad idea
[12:53:57] <Lambda_Aurigae> I have one programmer has both serial and parallel port plugs for the pc side
[12:54:30] <Lambda_Aurigae> has a 74ls125 for the parallel port stk200 clone thingie and max233 on the serial port.
[12:55:10] <carabia> Oh Lambda_Aurigae great, you're here, I was supposed to ask you about your pic project, are you dropping a scheduler on it or?
[12:55:26] <Lambda_Aurigae> which pic project?
[12:55:31] <Lambda_Aurigae> I have several.
[12:56:05] <carabia> The one you've been working on for ages, it was an emulator of something I can't remember... perhaps VIC-20, and iirc it had all kinds of bells and whistles
[12:57:18] <Lambda_Aurigae> oh, the neuvo-retro computer system.
[12:57:32] <Lambda_Aurigae> with a C interpreter rather than basic interpreter.
[12:57:52] <carabia> Oh yeah, C-interpreter.
[12:58:06] <Lambda_Aurigae> I wasn't planning on any kind of scheduler really...don't see a need for it as I'm not doing much in the way of multi-tasking.
[12:58:21] <carabia> Yeah, I totally remembered the project wrong.
[12:58:41] <carabia> Been away... in the sea of red.
[12:58:47] <Lambda_Aurigae> if I were to make it a multi-tasking OS then, yeah, I would go with a built in scheduler.
[12:58:48] <bss36504> A C interpreter? Aren't there more fun ways to drive yourself absolutely insane?
[12:58:56] <Lambda_Aurigae> bss36504, it's FUNJ!
[12:58:58] <Lambda_Aurigae> FUN too
[12:59:03] <Lambda_Aurigae> picoc
[12:59:07] <Lambda_Aurigae> already written for me.
[12:59:11] <Lambda_Aurigae> a C subset interpreter.
[12:59:15] <bss36504> Oh ok.
[12:59:22] <bss36504> brb, gonna google that
[12:59:24] <Lambda_Aurigae> I'm just paring it down to run on a pic32mx270f256b
[12:59:46] <Lambda_Aurigae> and combining it with a commodore c-64-ish OS.
[13:00:14] <Lambda_Aurigae> as in, C with line numbers.
[13:00:25] <bss36504> whats the execution speed?
[13:00:32] <Lambda_Aurigae> crap.
[13:00:33] <Lambda_Aurigae> hehe
[13:00:34] <bss36504> haha
[13:00:37] <bss36504> I figured
[13:00:41] <Lambda_Aurigae> but faster than the atmega1284p
[13:00:53] <Lambda_Aurigae> the pic32 I'm working with runs at 50MHz/83DMIPs
[13:01:00] <bss36504> oh ok
[13:01:08] <Lambda_Aurigae> so, about 4 times the speed of an AVR at 20MHz
[13:01:33] <Lambda_Aurigae> faster than a 6502 running at 1MHz interpreting basic though.
[13:01:42] <carabia> Hahaha
[13:01:44] <bss36504> do PIC32s still have that stupid "four clocks per instruction" nonsense that the 8 bit ones have?
[13:01:49] <Lambda_Aurigae> this isn't a pic
[13:01:51] <Lambda_Aurigae> it's a pic32
[13:01:55] <Lambda_Aurigae> totally different core.
[13:01:58] <carabia> it's a whatever-4000 it is.
[13:01:59] <Lambda_Aurigae> it's a MIPS core
[13:02:01] <carabia> MIPS4000
[13:02:07] <bss36504> ok well good
[13:02:11] <Lambda_Aurigae> blows the hell out of the standard pic core.
[13:02:14] <bss36504> that always drove me nuts
[13:02:20] <Lambda_Aurigae> yeah.
[13:02:25] <carabia> bss36504: 83 DMIPS should have given you an idea there :)
[13:02:28] <Lambda_Aurigae> that's why I go with pic32 rather than regular pic.
[13:02:29] <bss36504> like why do I need to have a 32MHz core when I can only execute at 8 MIPS
[13:02:35] <bss36504> yeah i saw that and wondered
[13:02:41] <Lambda_Aurigae> it's a multiple pipeline core.
[13:02:46] <bss36504> right
[13:02:48] <Lambda_Aurigae> with predictive execution.
[13:02:51] <Lambda_Aurigae> like a real CPU
[13:02:52] <bss36504> very fancy stuff
[13:02:54] <twnqx> meh mips
[13:02:56] <twnqx> reminds me
[13:03:09] <twnqx> did anyone here ever design multi-rank DDR 3 memory?
[13:03:24] <Lambda_Aurigae> DDR is black magic in and of itself.
[13:03:28] <Lambda_Aurigae> DDR3 is even worse.
[13:03:37] <twnqx> wat
[13:03:51] <Lambda_Aurigae> :}
[13:04:06] <Lambda_Aurigae> doing DDR3 on a solderless breadboard is,,,,difficult.
[13:04:19] * twnqx throws a softcopy of the Handbook of Black Magic at Lambda_Aurigae
[13:04:21] <Lambda_Aurigae> I will stick with 30pin SIPPs
[13:04:27] <carabia> I'm curious, twnqx what's the application?
[13:04:45] <twnqx> a dual to quad core mips cpu :P
[13:04:57] <Lambda_Aurigae> hmmm.
[13:05:01] <twnqx> few gig-e ports, bit of pci express, some usb3
[13:05:01] <Lambda_Aurigae> multi-core mips would be fun.
[13:05:02] <bss36504> Multi-rank? not familiar with that term
[13:05:18] <bss36504> DDR isnt magic though, its just complicated
[13:05:19] <twnqx> aka cavium octeon III
[13:05:28] <twnqx> i don't really see it as "complicated"
[13:05:39] <twnqx> keep impedance and lanegth matching happy, done
[13:05:40] <Lambda_Aurigae> holy shit...broadcom processors..64bit dual core mips.
[13:06:15] <bss36504> twnqx, right, I was gonna say as long as you're not trying to design the IP core to drive a DDR tranceiver, there's not *that* much work
[13:06:34] <bss36504> most CPUs that support it essentially "bolt on" provided your board layout is good
[13:06:41] <Lambda_Aurigae> they are all legacy though.
[13:06:43] <twnqx> yeah
[13:06:45] <bss36504> and /that/ is where the magic happens
[13:06:56] <twnqx> bits of magic, again, not muich
[13:07:00] <twnqx> i am just wondering
[13:07:13] <twnqx> is double-sided mounting for two ranks, like on DIMMs, superior
[13:07:17] <Lambda_Aurigae> looks like ARM has replaced MIPS for the most part.
[13:07:31] <carabia> twnqx: let me get this straight, you work at cavium?
[13:07:35] <twnqx> or could i get away with a single sided f-shape for address topology
[13:07:38] <twnqx> lolno
[13:07:47] <twnqx> i just want to make a new to
[13:07:48] <twnqx> y
[13:07:50] <carabia> or are you trying to replicate this, or... i'm kind of confused
[13:08:03] <twnqx> i want to design a board with dd3 and a cavium cpu
[13:08:06] <twnqx> ddr3*
[13:08:21] <twnqx> though currently at specs finding
[13:08:23] <carabia> Alright. Gotcha. What's the price for those cpus
[13:08:30] <twnqx> and with all the highspeed stuff i am taking my time
[13:08:33] <carabia> They seem... expensive at best
[13:09:07] <Lambda_Aurigae> gonna be a bitch to hand solder too.
[13:09:09] <Lambda_Aurigae> :}
[13:09:26] <twnqx> CN7130-1600WG640-CP-G, 37.7€ net @ 1000
[13:09:35] <twnqx> quadcore 1.6ghz
[13:09:45] <twnqx> CN7020-1200WG640-CP-G, 22.8€ net @ 1000
[13:09:49] <twnqx> dualcore 1.2ghz
[13:10:07] <bss36504> why not just buy an ARM?
[13:10:14] <bss36504> made by anyone else?
[13:10:19] <twnqx> because i like to be different
[13:10:28] <carabia> Yeh, probably $10 for some A-9 ha
[13:10:45] <twnqx> with 8x gbit? 2x sata 6gbit? 1-4pcie lanes?
[13:10:54] <twnqx> usb 3.0?
[13:11:02] <bss36504> Well I do too, but not for those prices. There's a lot of risk associated with this kind of board layout. It will probably not work the first, or even second try, not because I doubt your skills, but because youre one person.
[13:11:18] <bss36504> If you want that shit, just buy a xilinx Zynq and be done with it
[13:11:19] <twnqx> lol i have no intention do design that board
[13:11:31] <carabia> twnqx: let me check some soc prices
[13:11:34] <twnqx> i am speccing it
[13:11:40] <bss36504> Oh well I thought you were saying you wanted to put the Cavium and DDR3 on a board
[13:11:51] <twnqx> and hand it to a shop that has ddr & stuff experience, and the simulation soft etc
[13:12:01] <twnqx> yes, my own design
[13:12:05] <bss36504> but you could do that stuff with a Zynq or a Virtex. The Zynq has an A9 I believe
[13:12:14] <Lambda_Aurigae> daym..they even have linux for that processor series.
[13:12:29] <twnqx> yeah, octeons are THE standard network processors
[13:12:38] <twnqx> palo alto, juniper, ubiquity
[13:12:46] <bss36504> Are you building an appliance for funsies?
[13:12:51] <twnqx> yes
[13:13:07] <twnqx> well, my intention is more a kickstarter to refinance it
[13:13:13] <twnqx> but we'll see about that
[13:13:16] <Lambda_Aurigae> and a nifty little dev board for the Octeon-III
[13:13:23] <twnqx> kinda
[13:13:27] <Lambda_Aurigae> http://www.cavium.com/pdfFiles/OCTEON_CN7130_PB_Rev1.3.pdf?x=7
[13:13:39] <bss36504> well, good luck to you. I bailed on a 935MHz RFID project because the chips were $35 a piece and required a "challenging" RF layout. That was too rich for my blood
[13:13:44] <twnqx> all 4 kinds of the new M.2 sockets in top, components on the bottom
[13:14:38] <twnqx> so you can add all the fancy modern cards in, from ssds to wlan cards
[13:14:55] <twnqx> and with adaptercs legacy mini-pcie if you want e.g. graphics
[13:15:40] <twnqx> that's the goal, but alone in order to set the slots i need to make e.g. the RAM decision - double sided or f-shaped address lines
[13:16:11] <bss36504> Why not just use regular DDR3 DIMMs?
[13:16:20] <twnqx> 32bit interface only
[13:16:35] <twnqx> yes, dimms would have made life much easier.
[13:17:54] <twnqx> carabia: the only thing i found in arm land that's clsoe is the AppliedMico Helix H2
[13:22:27] <carabia> twnqx: yeah, buying high-end socs low qtys can be a bit... challenging to say the least
[13:22:48] <carabia> but designing the boards for them, uffff
[13:23:25] <twnqx> dunno, i do not really see anything THAT problematic
[13:23:26] <carabia> you would have a broad variety of sbcs to choose from if you'd be willing to drop the board designing part, but I guess that's kind of what you're doing here...
[13:23:34] <twnqx> actually, power supply seems more complicated than ddr3 :S
[13:23:36] <carabia> +and on the cheap
[13:23:58] <carabia> oh wait no, you have pci-e and everything.
[13:24:18] <twnqx> yes. and the pcie must be soft-switchable to sata on the sockets.
[13:24:19] <carabia> this could blow up to be a very expensive project.
[13:24:24] <twnqx> which is on-chip with caviums :P
[13:24:34] <twnqx> i had someone say 50k
[13:24:57] <twnqx> so yes, definitiely not cheap
[13:25:49] <carabia> what kind of qtys are you expecting?
[13:25:58] <twnqx> wellllll
[13:26:05] <twnqx> no idea. i want one.
[13:26:14] <carabia> ???
[13:26:27] <twnqx> the 50k is pure development cost for one
[13:26:34] <carabia> I know that
[13:26:55] <twnqx> i would hope for 1k, which should be around 300k toal
[13:26:56] <carabia> but for 50k r&d it should justified by some sort of a legit production run to follow
[13:27:01] <twnqx> 300k€*
[13:27:04] <carabia> +be
[13:27:29] <carabia> soo basically what you're looking for here, is for kickstarter to fund a toy, for you?
[13:27:32] <twnqx> but i need to get the specs to get offers first
[13:27:47] <twnqx> kind of. and find the 1k people who also want a toy like this.
[13:28:03] <twnqx> and if it works out, why not another production run
[13:28:34] <carabia> yes well, initial run's the one that will bite you
[13:28:54] <twnqx> exact6ly
[13:29:02] <carabia> i don't think i would be too far off saying not going to work on the first go, should prroooobably take that into account
[13:29:16] <twnqx> so basically, i hope to get someting that kinda works in the order of 10k, including sample quantity parts
[13:29:27] <twnqx> with kinda NOT meaning perfect
[13:29:36] <twnqx> 10k€* for first spin
[13:29:45] <twnqx> that probably won't work 100% as you assumed
[13:30:49] <twnqx> and gets ~5 boards to look at software
[13:31:25] <twnqx> before that i won't even bother with a kickstarter
[13:33:01] <specing> twnqx: you are in the wrong channel
[13:33:06] <specing> head over to ##fpga
[13:33:35] <twnqx> when did tthis ## stuff start... and why...
[13:34:18] <specing> < twnqx> aka cavium octeon III
[13:34:34] <specing> nice ... finaly someone wants to design a real board
[13:34:43] <specing> with real processors
[13:34:47] <specing> instead of Alljoke
[13:34:56] <specing> and rockshit
[13:35:03] <specing> Anyway
[13:35:29] <specing> are you aiming to run only FOSS on there?
[13:35:45] <specing> if so, the FSF might assist you (RYF and stuff)
[13:36:07] <twnqx> bss36504: to answer one of your open questions, a "rank" in ddr memory terms is a group of chips that together implement the full bus width. term has been coined since most chips internally run multiple banks.
[13:36:08] <specing> that octeon has no GPU, right?
[13:36:38] <twnqx> specing: yes to FOSS (as far as possible, but given decent available linux kernel, i would just say yes)
[13:36:47] <twnqx> specing: and correct, no GPU
[13:38:13] <specing> < twnqx> and hand it to a shop that has ddr & stuff experience, and the simulation soft etc
[13:38:17] <specing> expensive...
[13:38:37] <specing> < twnqx> carabia: the only thing i found in arm land that's clsoe is the AppliedMico Helix H2
[13:38:40] <specing> X-Gene?
[13:38:46] <twnqx> i think, yes
[13:38:57] <specing> no, helix is different chip I think
[13:39:19] <specing> twnqx: RYF requires *all* software to be free
[13:39:32] <specing> twnqx: including firmware and bootloaders (that are not in mask rom)
[13:40:10] <twnqx> yeah, but before i look into the terms&condition from cavium for their reference i simply cannot answer that
[13:40:24] <twnqx> i know people use u-boot with them though,
[13:40:34] <twnqx> and if so, no prob with opensourcing ours
[13:41:12] <twnqx> video probably would be an add-in card with silicon motion sm750
[13:46:04] <specing> twnqx: see this for reference:
https://raptorengineeringinc.com/TALOS/prerelease.php
[13:47:02] <specing> twnqx:
https://www.fsf.org/resources/hw/endorsement/respects-your-freedom
[13:49:50] <specing> you will also want to work with libreboot
[13:50:47] <specing> and seriously consider using [SO]DIMM instead of soldered RAM
[13:51:04] <twnqx> if you find me 32bit ones, sure
[13:51:07] <specing> the later is expensive, too low in quantity and noone likes it in general
[13:51:30] <specing> octeon does not have a 64-bit memory bus?
[13:51:40] <twnqx> these don't, the 7600 do
[13:52:09] <twnqx> they also only support two ranks, which makes it more pain
[13:52:11] <specing> so take the ones that do
[13:52:26] <twnqx> those atart FAR further up in price
[13:52:30] <specing> two ranks is not a problem, we have a list for GM45 libreboot use anyway
[13:52:33] <specing> no
[13:53:17] <specing> twnqx:
https://geizhals.eu/crucial-so-dimm-4gb-ct51264bf160b-a673173.html
[13:53:18] <specing> cheap
[13:53:27] <twnqx> uh, not the dimms
[13:53:30] <specing> ah ok
[13:53:37] <twnqx> the 7600 octeons i meant
[13:53:40] <specing> well if the board costs $500 alone...
[13:53:47] <specing> or whatever
[13:53:51] <twnqx> i wanted to rather have it for 200
[13:53:56] <twnqx> with memory, that is
[13:53:59] <specing> how much are those octeons?
[13:54:17] <twnqx> 20-40€ net
[13:54:21] <twnqx> @1k
[13:54:25] <specing> and 7600?
[13:54:34] <twnqx> got no pricing yet, and no NDA for those
[13:54:45] <twnqx> well, do datasheet permission, rather
[13:54:46] <specing> aprox?
[13:55:56] <twnqx> well, they start at 16 cores....
[13:56:09] <specing> higher/lower frequency?
[13:56:17] <twnqx> up to 2.4ghz, starting at 1.6
[13:56:26] <specing> not bad
[13:56:50] <twnqx> up to 48 cores, pcie 3 x8, interlaken x8
[13:56:57] <twnqx> really, neural search accelerator?
[13:57:06] <twnqx> 40G ethernet port
[13:57:22] <specing> Now thats something
[13:58:00] <twnqx> yeah, those are chips that drives highend firewalls and the likes
[13:58:18] <specing> is soldering chips onto the board cheaper than wasting half a [SO]DIMM?
[13:58:29] <twnqx> that was a thought i have, too
[13:59:10] <twnqx> but you'd run into so many compatibility problems, e.g. most so-dimms are quad rank
[13:59:39] <twnqx> and you will find neither 8B single rank nor 16GB dual rank SO-DIMMs
[13:59:57] <twnqx> micron is the only vendor that has the chips to max the small caviums at 8GB
[14:00:13] <learath> twnqx: that's weird, why?
[14:00:32] <twnqx> mh?
[14:00:39] <learath> sodimms quad rank
[14:00:46] <twnqx> price
[14:00:46] <learath> I've got some 16g ones
[14:00:53] <learath> quad rank is cheaper?
[14:01:23] <twnqx> also, are you sure those 16GB ones are DDR3?
[14:01:26] <twnqx> not DDR4?
[14:02:05] <specing> twnqx: what are the frequencies of those octeons you have datasheets for?
[14:02:16] <specing> and how many cores?
[14:02:19] <specing> and IPC?
[14:02:20] <learath> ddr3
[14:02:22] <twnqx> i am looking at two models, 1.2ghz dual and 1.6ghz quad cores
[14:02:24] <learath> http://www.wiredzone.com/supermicro-components-memory-ddr3-mem-dr316l-cl02-es16-10025067
[14:03:01] <specing> tbh 1.6Ghz is kinda low today, even in the consumer segment
[14:03:08] <specing> you have 2Ghz ARM SoCs
[14:03:11] <learath> world: crazy
[14:03:21] <learath> twnqx: it's dual rank
[14:03:24] <learath> according to the datasheet
[14:03:28] <learath> https://www.micron.com/resource-details/6b6cce0f-1985-4d12-8f0f-83ca94182652
[14:04:22] <twnqx> hm ok
[14:05:12] <twnqx> specing: octeons are made for network stuff mainly, and they have accelerators for that, up to tcp/udp layers
[14:06:03] <specing> I saw
[14:06:47] <twnqx> so there's not even mips support libreboot so far? :P
[14:06:59] <specing> nope
[14:07:45] <specing> Have you looked at ARM stuff like the X-Gene?
[14:08:16] <twnqx> everyone and their dog are doing arm :/
[14:08:37] <carabia> specing: I think he wouldn't actually get a funding for an ARM (not so sure about a mips-core either, but hey)
[14:09:05] <carabia> because, everyone and their dogs are rolling out arm-boards :)
[14:10:13] <twnqx> hm, there are cavium 72xx... but "networking: 12x 10GbE or 3x 40GbE" doesn't sound at the same price point either
[14:13:35] <specing> carabia: AllJoke arm boards
[14:13:39] <specing> not serious boards
[14:13:44] <specing> with serious chips
[14:13:57] <specing> aka x86 replacement
[14:14:16] <carabia> specing: they're not all allwinner...
[14:14:18] <specing> everyone and their dog are doing cheap ARM TV sticks
[14:14:21] <twnqx> uh, except the power 8 you linked, are there any?
[14:14:29] <specing> and "education boards"
[14:14:35] <specing> twnqx: no
[14:14:52] <specing> but the power thing is $1000 alone for the CPU
[14:15:04] <specing> thats ultra-high segment
[14:15:32] <twnqx> the biggest problem of non-x86 is software
[14:15:47] <specing> there is no board/chip combo aiming to replace $80 board/$150 cpu of x86
[14:15:48] <twnqx> because sadly, open source is not available for most serious things
[14:16:54] <specing> and you run the closed stuff on an x86 machine
[14:18:14] <twnqx> of course
[14:18:22] <twnqx> no other chip can compete
[14:18:43] <twnqx> i mean, wasn't power the only other in the 4ghz range?
[14:19:31] <specing> I think so
[14:20:05] <specing> people that would be interested in such a board would probably have spare x86 anyway
[22:13:47] <Tom_itx> 00000000000000000000000000000000000000000000000000000
[22:13:52] <Tom_itx> woops