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[04:36:13] <Skippy_42> good morning everybody
[04:36:48] <Skippy_42> I have a struct, which has uint8_t* data and uint8_t dataLen
[04:37:37] <Skippy_42> when I make a new array, and give data the address of the array, everything is fine, shouldn't it be?
[05:34:29] <theBear> erm, i think yeah, if by addres you mean a pointer, or i completely misread what you asking
[05:39:39] <Skippy_42> nevermind
[08:13:21] <carabia> Skippy_42: yes
[08:13:46] <carabia> a bit late of an answer but better late than never. home sweet home. I think it's soon time for a nap!
[08:15:49] <carabia> uint8_t arr[512]; uint8_t *data; data = arr;
[08:15:58] <carabia> data now points to the first element of arr.
[08:44:45] <carabia> reminds me, are pointers somehow abstracted with the arduino thing or?
[08:46:00] <LeoNerd> Pointers are just the same as in any other C platform
[08:47:29] <carabia> LeoNerd: but isn't that language not-C per-se?
[08:47:36] <LeoNerd> Hrm?
[08:47:53] <carabia> Processing right?
[08:48:24] <LeoNerd> That's basically a set of C++ libraries that are just invisibly included for you for free
[08:48:34] <LeoNerd> via a bit of processor insertion of boilerplate into the main file
[08:48:41] <LeoNerd> The program itself is just plain ol' C++
[08:48:55] <carabia> Alright. I was just wondering cause I know he's been doing things with it but seemed not to be familiar with pointers
[08:49:18] <carabia> I thought it was something that's just interpreted into C++...
[08:49:58] <carabia> Well, you learn something new every day
[17:16:38] <cehteh> w/o digging in the instruction set document, is there a 1cycle instruction to check if a bit is set or clear in a i/o register (analog to sbi/cbim but just testing)
[17:19:40] * cehteh thinks about using the GPIOR for a fast mutex implementation with 1 bit per mutex only
[17:21:47] <cehteh> ah, ANDI should suffice
[18:52:10] <Evidlo> is there a quick check i can do with avrdude to verify communication with my attiny84?
[18:52:33] <Lambda_Aurigae> read the fuses
[18:52:35] <Lambda_Aurigae> read the flash
[18:54:06] <LeoNerd> A simple -v with no -U will print the signature check
[18:54:14] <Lambda_Aurigae> that too.
[18:58:19] <Tom_itx> can you plug a short pcie card in a pci slot?
[18:58:29] <Tom_itx> or pcie16
[19:02:16] <Lambda_Aurigae> well,,
[19:02:29] <Lambda_Aurigae> physically, you can probably shove it in there.
[19:02:41] <Lambda_Aurigae> but pcie and pci are not cross compatible.
[19:03:36] <Tom_itx> looks like the plugs are different anyway
[19:04:34] <Casper> pci1x card can be installed in a 16x one
[19:04:58] <Casper> a pcie 16x card may, sometime, be installed in a 1x, if the end is open
[19:05:29] <Lambda_Aurigae> http://upload.wikimedia.org/wikipedia/commons/0/0c/PCI_und_PCIe_Slots.jpg
[19:05:32] <Casper> in other words, as long as it is pcie, it should work, if the device will work with less lines than what is available
[19:05:53] <Casper> but pci and pcie are incompatible
[19:05:57] <Lambda_Aurigae> pci and pcie don't have the same pin spacing
[19:06:03] <Lambda_Aurigae> and are totally different interfaces.
[19:09:08] <Lambda_Aurigae> PCI is basically a big honking parallel interface, like the old AT and such...
[19:09:28] <Lambda_Aurigae> PCIe is a monster serial port...multiple port serial port.
[19:09:46] <aandrew> PCIe is the new hotness ... well old hotness
[19:09:53] <aandrew> PCI was fairly easy to design for
[19:10:31] <Lambda_Aurigae> almost impossible to do a hobby interface for PCIe
[19:10:39] <aandrew> yes
[19:10:44] <Lambda_Aurigae> I loved AT bus.
[19:10:51] <aandrew> you can use a PLX chip which basically gives you PCIe-to-parallel interface
[19:10:52] <Lambda_Aurigae> built many cards for that.
[19:10:57] <aandrew> heh yep I did as well
[19:11:12] <aandrew> my very first was an 8255 board because I hated fucking around with parallel ports
[19:11:22] <Lambda_Aurigae> hehe.
[19:11:27] <Lambda_Aurigae> I have a stack of 8255 chips.
[19:11:30] <aandrew> so the point-to-point soldered card had 3x 8255s on it with the tiny bit of glue (LS138 IIRC) to decode
[19:11:43] <Lambda_Aurigae> even did some 8052 and AVR interfaces to 8255
[19:12:34] <Lambda_Aurigae> memory mapped i/o is awesome.
[19:12:48] <aandrew> :-)
[19:18:19] <Evidlo> Is the USCK referenced in the attiny datasheets the same thing as SCK?
[19:18:34] <Evidlo> I'm trying to figure out why I can't program my device
[19:18:53] <Lambda_Aurigae> what atiny?
[19:19:41] <Evidlo> attiny84
[19:20:05] <Lambda_Aurigae> I was off by one...opened attiny85
[19:20:31] <Evidlo> one second, I'm exporting my schematic
[19:21:24] <Evidlo> http://imgur.com/a/DIBuP
[19:21:52] <Lambda_Aurigae> and, yes, SCK is the same as USCK on that chip.
[19:22:08] <Evidlo> I've done this before several times with an 84, so I'm not a total noob
[19:22:57] <Lambda_Aurigae> I don't see where your SCK from the ISP is connected.
[19:23:40] <Evidlo> It is connected to DATA_OUT
[19:23:40] <Lambda_Aurigae> pdi/soic package?
[19:23:45] <Evidlo> DIP
[19:24:12] <Evidlo> Here's the actual board
http://imgur.com/a/TEcv1
[19:25:17] <Lambda_Aurigae> is there something in the attiny85 socket?
[19:25:25] <Lambda_Aurigae> that could be causing you issues with the programmer.
[19:25:47] <Evidlo> yes, theres an 85
[19:26:00] <Evidlo> Ill pull it
[19:26:59] <Lambda_Aurigae> what state is pin3/PB4/DATA_OUT pin on the tiny85 when trying to program the tiny84?
[19:27:00] <Evidlo> Lambda_Aurigae: that worked
[19:27:13] <Lambda_Aurigae> the tiny85 is horking hairballs on your ISP
[19:27:39] <Lambda_Aurigae> probably has a pin set as an output that is connected to the ISP pins on the 84.
[19:28:14] <Evidlo> Lambda_Aurigae: does it matter that the 85 is powered off?
[19:28:21] <Lambda_Aurigae> nope.
[19:28:32] <Lambda_Aurigae> it could still be interfering.
[19:28:59] <Lambda_Aurigae> powered off, it could be grounding the pin out maybe?
[19:29:03] <Lambda_Aurigae> would have to test it.
[19:29:17] <Evidlo> do IO pin settings on the 85 have an effect when the 85 is off?
[19:30:49] <Lambda_Aurigae> the pin settings don't.
[19:30:59] <Lambda_Aurigae> would have to test the chip to see what it does unpowered though.
[19:31:20] <Lambda_Aurigae> and I don't have one handy. I'm in the living room watching movies and all my toys are across the street in my workshop.
[19:31:30] <Evidlo> well, problem solved for now. thanks
[19:32:38] <Lambda_Aurigae> welcome.
[19:32:54] <Lambda_Aurigae> if you powered the tiny85 and set all the pins to inputs then it wouldn't interfere.
[19:36:18] <cehteh> what definition of 'off' .. thinking if vcc is floating or pulled to gnd may make a difference in tripping the protection diodes
[19:36:52] <Lambda_Aurigae> I keep forgetting about those.
[19:37:09] <Lambda_Aurigae> so, yeah, that could be causing the problem.
[20:37:36] <Evidlo> quick
[20:38:26] <Evidlo> Quick Q: What's the right way to invert the statment on line 287?
https://dpaste.de/LM0M
[20:39:30] <Lambda_Aurigae> what do you mean exactly by invert?
[20:39:59] <rain1> just if (!(~PINB & 1<<PB5)){
[20:40:27] <Lambda_Aurigae> well, yeah, that inverts the wholething.
[20:40:37] <Emil> What did cmos logic pull inputs to?
[20:40:44] <Emil> Was it high?
[20:40:52] <Lambda_Aurigae> input should be high-Z
[20:40:53] <Emil> when floating; that is
[20:41:00] <Evidlo> that statement checks if PB5 is high, right?
[20:41:04] <Evidlo> the original one
[20:42:07] <Lambda_Aurigae> just drop the ~
[20:42:12] <Lambda_Aurigae> that will check if it is high.
[20:43:39] <Evidlo> this is driving me nuts
[20:44:05] <Evidlo> shouldn't `(~(PINB & 1<<PB5))` check if its low?
[20:44:39] <Lambda_Aurigae> ~ is bitwise invert.
[20:45:37] <Lambda_Aurigae> so, if the pin is set to 1 and you do a bitwise & with 1 then it comes back 1.
[20:45:51] <Lambda_Aurigae> and you just changed the formula there.
[20:46:02] <Evidlo> I know, but I can't figure out how to invert 287 to 298
[20:46:04] <Lambda_Aurigae> you put the ~ outside the inner ()
[20:46:51] <Lambda_Aurigae> you aren't doing any comparison in there at all.
[20:46:58] <Lambda_Aurigae> the & is not a comparison.
[20:47:12] <Evidlo> its just masking out irrelevant bits
[20:47:45] <Lambda_Aurigae> so, in the first one you posted, (~PINB & 1<<PB5)
[20:48:33] <Lambda_Aurigae> you are doing a bitwise AND of whatever PINB is inverted with 00010000 {{1<<PB5}
[20:49:06] <Evidlo> so if pin 5 is zero, it should return a nonzero number and be true
[20:49:14] <Lambda_Aurigae> so if PINB contains 00010000 the ~ turns it into 11101111 which, anded with 00010000 comes back 0
[20:49:20] <Lambda_Aurigae> no.
[20:49:44] <Evidlo> I want the statement to check if pin 5 is low
[20:49:59] <Evidlo> right now my code is doing the opposite and I don't understand why
[20:50:13] <Evidlo> (the dpaste link)
[20:50:15] <Lambda_Aurigae> (PINB & 1<<PB5) will return non zero only if that pin is on.
[20:50:41] <Evidlo> I have (~PINB & 1<<PB5) in my pasted link
[20:51:04] <Lambda_Aurigae> I know.
[20:51:23] <Lambda_Aurigae> I'm thinking here.
[20:51:42] <Lambda_Aurigae> so...inverting it...if the bit is 0..then inverting PINB will set it to 1.
[20:51:54] <Lambda_Aurigae> so it should return non-zero.
[20:52:03] <Lambda_Aurigae> sorry,,late in the evening and my math-fu is weak tonight.
[20:53:18] <Evidlo> actually I don't think my problem has anything to do with that statement
[20:53:19] <Lambda_Aurigae> I would write it as if ((1<<PB5) == ((~PINB) & (1<<PB5)))
[20:53:28] <Lambda_Aurigae> but, I'm all for overkill.
[20:54:56] <Lambda_Aurigae> but, ultimately, I should take more drugs....and your comparison should work as it stands to read low on that pin.
[20:55:10] <Evidlo> somehow holding PCINT5 low makes OC1A stop
[20:55:36] <Lambda_Aurigae> so, we are shifting gears.
[20:56:13] <Lambda_Aurigae> PCINT5 is an interrupt designation..which, I'm guessing, corresponds to PC5, not PB5
[20:57:43] <Lambda_Aurigae> or, I could be totally off my rocker.
[20:57:53] <Lambda_Aurigae> as it's apparently an attiny85 which changes designations in my mind.
[20:57:59] <Lambda_Aurigae> as there is only port b
[20:59:12] <Lambda_Aurigae> and in the code you have the PCINT interrupt vector commented out.
[21:00:26] <Evidlo> Lambda_Aurigae: yes, I wrote this a long time ago, but I think OC1A is configured to toggle the output on compare match
[21:06:21] <Lambda_Aurigae> looks right.
[21:06:39] <Lambda_Aurigae> but I would have to dig through the rest of the code to see what all is set and doing what.
[21:08:48] <carabia> Where is this said code
[21:10:45] <Evidlo> carabia:
https://dpaste.de/LM0M
[21:11:26] <Evidlo> it is a full duplex FSK modem
[21:12:03] <Evidlo> sorry, half-duplex. PB5 sets the direction
[21:13:13] <Evidlo> my problem is that when I set PB5 to low, PB1 stops modulating. even if I change line 287 to `if (1)`, it still stops
[22:32:25] <Evidlo> what do you guys think about the msp430 architecture vs avr?
