Back
[09:24:41] <rue_house> why is he writing a bootloader?
[09:31:28] <_ami_> rue_house: who is writing it?
[09:31:57] <_ami_> good to follow him on github to know and understand how he is doing it! :)
[09:32:19] <rue_house> <PoppaVic>
[09:32:36] <rue_house> how?
[09:32:44] <rue_house> I'd rather know why
[09:33:14] <rue_house> is it like a HD447880 library or is there a reason
[09:33:15] <_ami_> rue_house: may be he can write better than existing ones. (lesser flash writes?)
[09:33:44] <_ami_> or he probably wants to explore it
[09:51:45] <Jartza> I've written 12 bootloaders
[09:51:49] <Jartza> I counted one day
[09:51:54] <Jartza> but only 3 for AVR
[09:52:27] <rue_house> why did you write the avr ones?
[09:58:13] <_ami_> Jartza: nice, is your code public? link plz?
[09:58:32] <_ami_> i am more interested in AVR ones
[10:04:46] <skz81> rue_house, i'm not sure he's writting one >> <PoppaVic> I'm looking into writing a bootloader vs writing an app.
[10:04:57] <skz81> "vs writting an app" seems meaningful here ^^
[10:28:34] <Chillum> Apps?? bah, when I was a kid we called them "programs"...
[11:02:19] <WormFood> Chillum, were they stored on paper tape?
[11:03:07] <Chillum> https://upload.wikimedia.org/wikipedia/commons/d/d8/Floppy_disk_5.25_inch.JPG
[11:03:31] <WormFood> I have a pair of 8" floppy drives, back in usa
[11:05:13] <Chillum> okay your floppy is bigger than mine
[11:06:21] <CasperAtWork> back in the day when a floppy was actually... floppy...
[11:07:25] <CyberLiwakura> (the nick change is just for satirical reasons)
[11:12:43] <WormFood> I didn't actually use the 8" floppies.
[11:13:03] <WormFood> I rescued them from going to the dump
[13:04:48] <carabia> I'm a bit baffled by the sdcard.org white paper on the card standard
[13:05:04] <WormFood> baffled about what?
[13:05:22] <carabia> For SPI-mode they specify both cmd1 AND acmd41 as commands to fire init
[13:06:59] <carabia> https://www.sdcard.org/downloads/pls/pdf/part1_410.pdf The table starts at p. 179
[13:07:18] <carabia> Sorry, I mean 163.
[13:07:40] <carabia> Depends how you look at it really, heh
[13:07:55] <carabia> 7.3.1.3 Index in any case.
[13:09:59] <carabia> Oh wait it's described with this ultra small print on a preceding page. Alright then.
[13:47:34] <LeoNerd> carabia: SD vs HD?
[13:47:51] <LeoNerd> SD being the <= 2GiB cards
[14:03:10] <bss36504> Anybody here tried to make an Xilinx FPGA programmer with something like a 32U4? I'm concerned you'd be unable to store the programming data for the FPGA on the MCU. I guess you could make it appear as a mass storage device and program from some sort of storage flash, that would be kind of neat.
[14:09:11] <bss36504> I might not even want the AVR on board though. I plan to have an Edison/FPGA module, so another micro might be a bit redundant. Ideally I would just bake the FPGA programmer into the edison.
[14:10:18] <twnqx> sounds... weird
[14:10:28] <twnqx> but given you can run at least xilinx fpgas as spi slaves
[14:10:40] <twnqx> you could use an avr
[14:10:54] <twnqx> but yes, the usual config size for mine is in the mbits
[14:11:08] <bss36504> True, I guess I don't need to go the JTAG programmerroute. I could just do the serial boot way which would probably be easier to code.
[14:11:12] <twnqx> i just drop an SPI nor flash near the fpga and program it via jtag
[14:11:22] <bss36504> that is another option i considered
[14:11:31] <bss36504> Idk right now, sort of just brainstorming.
[14:11:36] <twnqx> the jtag programmer is easy with an ft2232 or the like
[14:12:15] <twnqx> (hint: you upload a helper image via jtag, then use that helper image to program the flash via SPI, which is also how xilin'x software does it)
[14:12:35] <bss36504> huh, thats neat. Totally makes sense though.
[14:13:14] <bss36504> End goal is to do some decent image processing with this unit. I'd like to use OpenCV if possible, hence the linux machine, but I can farm out some of the functions to the FPGA.
[14:13:57] <bss36504> First thing that needs to be done to the images before they even reach the software is to downscale from 1080p, maybe do some color thresholding.
[14:13:57] <twnqx> there's some open source stuff to do xilinx spartan 3 like this
[14:14:00] <twnqx> with the ft chips
[14:14:15] <twnqx> (at least; last played with it years ago)
[14:14:53] <bss36504> It would be super cool if Xilinx sold an Artix that has less than 250 pins...
[14:19:56] <bss36504> ..or even a spartan 6 for that matter (though there is one Spartan 6 with 132 pins). I don't understand this obsession with putting hundreds of I/O on every device. I realize that sometimes it's necessary, but what if you just want logic density? Too bad, you still need to spend $$$ on a board layout/fab process that can support <.8mm BGA
[14:20:00] <bss36504> so frustrating.
[14:22:05] <twnqx> aren't there tqfp/vqfp 100/144 any more?
[14:22:17] <twnqx> or do those not enough enough logic?
[14:22:25] <twnqx> but yes, i was annoyed by that before, too :P
[14:23:43] <bss36504> I don't think they make anything above a spartan 3 in QFP. And it's not so much that I need 1 Million gates, but even if i was working for a small company and we wanted some serious custom logic, you're looking at an extremely complex and expensive PCB layout just for a prototype, which may not even work out. And it's just unattainable for hobby st
[14:23:43] <bss36504> uff.
[14:25:22] <bss36504> If you're making tens of thousands of an IC, you probably want to look at an ASIC with the right number of pins for the application. But if youre in that "donut hole" where your volume is low enough that you cant afford the ASIC, but you can afford the $20-$30 per FPGA, you still get screwed on your board costs because what could have been a low de
[14:25:22] <bss36504> nsity BGA or a QFP now has all this extra hoops to jump through
[15:37:08] <twnqx> not really
[15:37:17] <twnqx> the high pin count BGAs can be mostly left floating
[15:37:39] <twnqx> and else connected to power/gnd as you like, and fits your vias
[15:37:53] <twnqx> you just have to be carefull when writing the UCF
[15:38:17] <twnqx> though hm, defined signal might be better, not floating. need to read data sheetr
[15:45:05] <carabia> This was better than expected. On a really ghetto half-breadboard -setup for SPI (avr-sd), also through a 74hc125 and i can clock it at 5MHz quite reliably
[15:45:54] <carabia> though really minimizing any breadboard runs
[15:47:57] <carabia> Still need to do more testing. And need to get my proper scope off work tomorrow. To be continued.
[16:19:35] <Chillum> 74hc125s are great
[16:50:58] <carabia> Well I didn't need tristate but whatever. I had some of these laying around
[21:24:43] <Chillum> ya I tend to resort the the 74hc125s when it is overkill just because I have a pile of them
