#avr | Logs for 2015-10-31

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[00:25:26] <Xark> No
[00:25:33] <Xark> MIPS is MIPS (and PIC32). :)
[00:25:41] <Xark> AVR is AVR8
[00:31:32] <Casper> but ain't AVR risc based?
[00:33:11] <Xark> Casper: Well, yes.
[00:33:22] <Xark> This is just a "style" of CPU
[00:34:31] <Xark> AVR, MIPS and ARM are all RISC-ish, but they are different architectures.
[05:22:27] <Lambda_Aurigae> pewpau, no...avr is avr....but speed is measured in Million InstructionsPer Second or MIPS.
[05:23:42] <pewpau> I mean, does it use the MIPS instruction set
[05:23:57] <Xark> True...but MIPS also stands for Meaningless Indicator of Processor Speed (since an "instruction" can mean different things). :)
[05:24:18] <Xark> It does not (not even close, MIPS is 32 bit).
[05:24:48] <pewpau> I thought MIPS was a standard used by many different brands
[05:25:06] <Xark> MIPS(TM) is a processor architecture.
[05:25:26] <Xark> Millions of Instructions Per Second is a (mostly) meaningless benchmark.
[05:25:28] <twnqx> there's also mips64
[05:25:43] <Xark> Several MIPS architecture flavors even.
[05:26:26] <Xark> MIPS I, II, III, IV, V, 32, 32.1, 32.2, 32.3, 32.5 and MIPS64 -> https://en.wikipedia.org/wiki/MIPS_instruction_set
[05:26:27] <twnqx> pewpau: there are embedded processors with MIPS cores indeed
[05:26:51] <twnqx> e.g. octeon processors are mips64 based
[05:26:53] <Xark> PIC32 typically (but also some Broadcom and others).
[05:27:39] <twnqx> but avr 8 bit and avr32 are unique architectures
[05:27:40] * Xark notes Playstation 1 and 2 were MIPS based (but 3 was PowerPC and 4 is x86-64).
[05:28:23] <Lambda_Aurigae> I like the pic32 chips for a current MIPS32 based architecture for microcontrollers.
[05:28:31] <Lambda_Aurigae> avr is much simpler platform all around though.
[05:28:44] <Lambda_Aurigae> and uses its own proprietary instruction set.
[05:28:59] <pewpau> so many architectures, so much new stuff all the time. How do you keep up?
[05:29:08] <Lambda_Aurigae> which somewhat reminds me of my first ever assembly language from the 6502.
[05:29:08] <Xark> Lambda_Aurigae: Yeah, seem pretty nice. I am not amused by Microchip compiler shenanigans, but free compilers easily available now. I am considering using one to be USB host for FPGA design.
[05:29:14] <pewpau> by the time you've learned one there's a new version out already
[05:29:54] <Xark> pewpau: Once you lean one assembly, the rest are "easy" (but takes a while to not have to have the "reference book" open). :)
[05:29:58] <Xark> learn*
[05:30:09] <Lambda_Aurigae> Xark, yeah,,I work mostly with pic32mx270f256b chips these days...usb, 256k flash, 64k sram, 50MHz/83dmips, 28pin dip, able to run code from flash or sram.
[05:30:44] <Xark> Cool. I have real small one (like 28 DIP) and some of the 512K flash ones (and I think 128KB SRAM).
[05:31:01] <Lambda_Aurigae> I didn't think they were that big in dip yet.
[05:31:08] <Xark> I was running retro-BSD on one for fun. :)
[05:31:19] <Xark> No, big one is TQPF
[05:31:22] <Xark> TQPF
[05:31:30] <Xark> TQFP (third times the charm)
[05:31:36] <Lambda_Aurigae> but in dip, the pic32mx270f256b is the largest.
[05:31:45] <Lambda_Aurigae> for flash and ram anyhow.
[05:31:54] <Lambda_Aurigae> unless they added one in the last 2 weeks.
[05:32:33] * Xark links https://atomsoft.wordpress.com/atom32/
[05:33:14] <Lambda_Aurigae> yeah..have seen those.
[05:33:34] <Lambda_Aurigae> you mentioned 28dip with 512k flash and 128k sram...
[05:33:53] <Xark> I have one of these toohttp://fubarino.org/sd/index.html
[05:34:03] <Xark> No, the DIP is much smaller. MX250 IIRC.
[05:34:16] <Lambda_Aurigae> aahh.
[05:34:29] <Lambda_Aurigae> the mx270 has twice the flash and ram of the mx250.
[05:34:47] <Xark> 128KB flash, 32KB SRAM (I got it when it first came out, haven't done much with it).
[05:34:56] <Lambda_Aurigae> I have a stack of both.
[05:35:13] <Xark> Do you know if MX250 will do USB host?
[05:35:23] <Lambda_Aurigae> usb-otg version of usb-host, yes.
[05:36:11] <Xark> I see.
[05:36:15] <Lambda_Aurigae> I've used it for chip to chip comms.
[05:36:20] <Lambda_Aurigae> and for reading flash drives.
[05:36:30] <Lambda_Aurigae> reading and writing even.
[05:36:48] <Xark> Cool. Implementing USB host on FPGA is just too "expensive".
[05:36:55] <Lambda_Aurigae> yeah.
[05:37:13] <Lambda_Aurigae> I even started using them as general usb-serial/i2c/spi interface chips.
[05:37:17] <Lambda_Aurigae> with lots of buffer!
[05:37:21] <Xark> I think I just use the Atom32 board for the time being.
[05:38:05] <Xark> (More then enough, I think to read HID keyboard/mouse and maybe controller)
[05:38:37] <Lambda_Aurigae> https://hackaday.io/project/6258-two-component-usb-temperature-data-logger this is a nifty little implementation too....not pic32 though....
[05:38:48] <Lambda_Aurigae> pic chip that can do usb with no externa components whatsoever.
[05:38:55] <Lambda_Aurigae> external
[05:39:19] <Xark> Yeah, I saw that. :)
[05:39:39] <Xark> I really don't want to mess with non-MIPS PIC. Too horrible (and no free C). :)
[05:39:41] <Lambda_Aurigae> just got my samples of that series chips and plan on playing this weekend.
[05:39:50] <Lambda_Aurigae> there's free xc8 compiler.
[05:39:58] <Xark> Crippled...
[05:40:06] <Lambda_Aurigae> limited optimization unless you hack or buy it.
[05:40:11] * Lambda_Aurigae whistles innocently.
[05:40:28] <Lambda_Aurigae> the xclm hack works wonders.
[05:40:32] <Xark> But, just an ideological thing. I prefer to avoid PIC. :) Horrible architecture.
[05:40:38] <Lambda_Aurigae> the crippled part is only optimization though.
[05:40:56] <Lambda_Aurigae> I started with pic in the microcontroller world back around 2000...then quickly moved to avr.
[05:41:02] <Xark> Yeah...I kinda like that part. :)
[05:41:04] <Lambda_Aurigae> pic still has things avr doesn't.
[05:41:20] <Lambda_Aurigae> like usb in a dip package.
[05:41:34] <Lambda_Aurigae> and some of the other peripherals.
[05:41:47] <Lambda_Aurigae> I've grown rather fond of the pic32 line though.
[05:41:57] <Xark> Fair enough, but I'll ignore them. :)
[05:42:13] <Lambda_Aurigae> writing in C, pic, pic32, and avr are all similar except for their peripherals and fuse settings.
[05:42:14] <Xark> PIC32 is different. I have a fondness for MIPS. :)
[05:42:46] <Xark> Sure.
[05:42:55] <Lambda_Aurigae> two features of the pic32 drew me in hard..
[05:43:09] <Lambda_Aurigae> usb in dip package,,,and execution of code from sram.
[05:44:25] <Lambda_Aurigae> I have a somewhat working implementation of a c64-ish clone on a pic32 where I can actually load into sram and run binaries from an sd card.
[05:44:33] <Xark> Neat.
[05:44:44] <Lambda_Aurigae> still have to compile them off chip though.
[05:44:49] <Xark> I got a pretty zippy 6502 on AVR, but SRAM only. :)
[05:45:21] <Lambda_Aurigae> I'm using pico-c modified instead of basic too...
[05:48:28] <Xark> Lately I have been using soft-core MIPS on FPGA -> http://www.nxlab.fer.hr/fpgarduino/ (50Mhz on my cheap FPGA board).
[05:48:44] <Lambda_Aurigae> I want to get an fpga or three and learn vhdl.
[05:49:10] <Xark> Kind of challenging, but fun. :) Like assembly language for hardware.
[05:49:16] <Lambda_Aurigae> yeah.
[05:49:27] <Lambda_Aurigae> I've looked but never gotten serious on it.
[05:49:41] <Lambda_Aurigae> need to talk the wifey into some spare money to buy a couple of fpga boards.
[05:49:50] <Xark> Be careful, it is addicting -> https://i.imgur.com/HXp2ixj.jpg :)
[05:49:54] <Lambda_Aurigae> I gotta pick one that has free tools for linux too.
[05:50:20] <Lambda_Aurigae> http://dangerousprototypes.com/2015/10/31/designing-a-cpu-in-vhdl/
[05:50:29] <Lambda_Aurigae> that just came across my reading list this morning.
[05:50:43] <Xark> Been having fun designing SRAM VGA bitmap and text mode for f32c https://i.imgur.com/gFzT7mU.jpg
[05:51:03] <Xark> Lambda_Aurigae: Yeah, I am familiar with that series.
[05:51:10] <Xark> Good stuff.
[05:51:16] <Xark> "TPU". :)
[05:51:26] <Lambda_Aurigae> I want to make a serial processor.
[05:51:31] <Lambda_Aurigae> process one bit at a time.
[05:51:34] <Lambda_Aurigae> in fpga.
[05:51:48] <Xark> Well, very doable.
[05:51:53] <Lambda_Aurigae> yeah.
[05:52:10] <Lambda_Aurigae> was reading an article on an 800 transistor serial processor...or something like that..
[05:52:13] <Lambda_Aurigae> gave me idears.
[05:52:35] <Xark> Took me a while to finally grok VHDL (where all code runs "in parallel" - quite different from software model)
[05:52:59] <Lambda_Aurigae> it's just code version of digital logic from what I see.
[05:53:16] <Lambda_Aurigae> each block is a logic thingie that takes in data and clock pulses and puts out pulses of its own.
[05:53:38] <Lambda_Aurigae> pulses/levels/whatever.
[05:53:40] <Xark> Indeed. It looks like code, but doesn't act like code (it is hardware). :)
[05:54:04] <Xark> I had a lot of "off by one cycle" bugs while learning. :)
[05:54:08] <Lambda_Aurigae> building digital logic with text blocks instead of nice little squares and triangles.
[05:54:31] <Lambda_Aurigae> the syntax is what's gonna kill me at the start.
[05:54:54] <Xark> Also takes a while to learn that the "else" is more expensive than just letting it "compute" the result and ignoring it (etc.).
[05:55:05] <Lambda_Aurigae> well duh..
[05:55:26] <Xark> VHDL is very "anal". :) But I like the type safety vs Verlog.
[05:55:54] <Lambda_Aurigae> do you do your work on linux or windows?
[05:56:21] <Xark> Both, mostly FPGA stuff on Win7, but recently I got Altera and Xilinx setup for Ubuntu (Lattice soon...).
[05:56:31] <Xark> Kind of nice to type "make" to do FPGA build.
[05:56:39] <Lambda_Aurigae> I get these emails from altera on some free online courses.
[05:56:41] <Xark> (vs GUI stuff)
[05:56:52] <Xark> Altera is quite lInux friendly.
[05:56:57] <Lambda_Aurigae> just looking to see what their linux tools are like right now.
[05:57:01] <Xark> Linux*
[05:57:38] <Lambda_Aurigae> what series fpga should I look at on altera?
[05:58:22] <Xark> DE0-Nano, BE-MicroCV or DE-Nano SoC are all nice boards. Or go for cheap and get "ebay" ~$20 CycII, still a great board to learn on (as long as you can hook your own peripherals to GPIO).
[05:58:27] <osteri> Xilinx has their own ISE in Linux i've head
[05:58:33] <osteri> heard*
[05:58:50] <Xark> Sure, Xilinx Altera and Lattice all "support" Liunx.
[05:58:58] <osteri> yeah ;)
[05:59:12] <Xark> Xilinx "mostly works" (a few issues with license manager and USB JTAG).
[05:59:26] <Xark> Altera is the "smoothest" IMHO.
[05:59:31] <Xark> (for Linux)
[05:59:36] <osteri> you might end up with very niche-userbase bugs
[05:59:51] <Lambda_Aurigae> I'm hoping for a cheapish kit with a decent size fpga on it that I can get on a board with no external jtag interface..just a usb programming interface on the board.
[06:00:24] <Xark> Lambda_Aurigae: The DE0-Nano boards have built in JTAG (both <$100 or so IIRC).
[06:00:43] <Lambda_Aurigae> I was hoping for sub $30.00
[06:00:44] <Lambda_Aurigae> hehe
[06:01:03] <Xark> Well, ebay CycII and USB-Blaster Clone. :)
[06:01:50] <Xark> Even Max-10 board is $50 -> http://www.mouser.com/ProductDetail/Altera/EK-10M08E144ES-P
[06:01:57] <twnqx> Xark: i think the usb-jtag is solved
[06:02:19] <Xark> twnqx: Yeah, by $5 USB Blaster. :)
[06:02:28] <twnqx> http://git.zerfleddert.de/cgi-bin/gitweb.cgi/usb-driver or by this i think
[06:02:33] <twnqx> though it's not maintained for ages
[06:03:02] <Xark> Sure. Also xc3sprog and URJtag and OpenOCD. :)
[06:03:22] <twnqx> yeah, but only for... well
[06:03:25] <twnqx> spartan 3...
[06:03:25] <Xark> Even Arduino JTAG options now. :)
[06:03:38] <Lambda_Aurigae> ardweeny..ewww...hehe
[06:03:42] <twnqx> i toyed with xc3sprog
[06:03:46] <twnqx> didn't like it
[06:04:18] <twnqx> i just use the extracted programming tools in a windows VM :X
[06:04:21] <Lambda_Aurigae> hmmm...BEMICRO CV
[06:04:28] <Lambda_Aurigae> cyclone 5 board.
[06:04:29] <Xark> xc3sprog works fine for me on Papilio Spartan 3/6, and Scarab Minispartan6+.
[06:04:53] <Xark> Lambda_Aurigae: Yeah, decent board for the price.
[06:04:53] <twnqx> for attached SPI programming`
[06:04:56] <twnqx> ?
[06:05:12] <Xark> twnqx: Sure. With "passthrough" bitfile.
[06:05:32] <Xark> twnqx: Pretty standard method.
[06:06:27] <Lambda_Aurigae> dang thing has embedded usb-blaster even.
[06:06:47] <twnqx> last i checked they didn't hve passthrough bitfiles
[06:06:48] <Xark> Yeah, most real dev boards do (vs ebay cheapies).
[06:06:51] <twnqx> for most fpgas
[06:07:09] <Xark> twnqx: Well, I have them for all the ones I care about (and not hard to make a new one).
[06:09:02] <Lambda_Aurigae> biggest question is,,,just how big a chip,,,code size wise,,,,is the fpga on that thing?
[06:09:18] <Lambda_Aurigae> as I know nothing about the specs.
[06:09:21] <Xark> twnqx: I will say xc3sprog is a pain to get running on Ubuntu (due to ftdi1 library use vs ftdi0). :)
[06:09:41] <Xark> The BEMicroCV chip is "generous".
[06:09:53] <Xark> I think you can run Linux on it.
[06:09:58] <Lambda_Aurigae> daym.
[06:10:11] <Lambda_Aurigae> this board does come with 1GB of external sram too.
[06:10:39] <osteri> Lambda_Aurigae: simulation functionality is quite good is FPGAs, you don't actually have to buy one first, you could just play with the simulator
[06:10:45] <Xark> The propeller people use it a lot (as it will easily fit a Prop I and I think Prop II Verilog design).
[06:10:59] <Lambda_Aurigae> osteri, does it work on linux? I haven't found the software yet.
[06:11:03] <Xark> Very true (but no fun). :)
[06:11:12] <Lambda_Aurigae> I kinda like the hardware though.
[06:11:15] <Xark> Grab GHDL and GTKWave :)
[06:11:29] <Xark> I think it is called fvhdl under Ubuntu...
[06:12:00] <Xark> (Several Verilog simulators too - but I avoid icky Verilog)
[06:12:17] <osteri> Lambda_Aurigae: well, if it doesn't work, then it's not worth trying... simulation is very big part of FPGA workflow (at least has been in my projects)
[06:12:29] <Lambda_Aurigae> freehdl actually.
[06:12:39] <Xark> Okay..
[06:12:57] <Xark> I just installed that the other day and was able to simulate a UART design quite nicely.
[06:14:12] <Xark> Lots of simulation is the ugly secret of FPGA design. :) The cruel part is even if it simulates correctly, it is no guarantee it will work on real FPGA (but the reverse is generally not true). :)
[06:14:44] <Mr_Sheesh> Race conditions sometimes haven't been simulated accurately in the past, for one thing
[06:14:46] <Lambda_Aurigae> now to figure out how to use it...hehe
[06:15:22] <Xark> Mr_Sheesh: Correct, they don't really even try. You just have to avoid those situations. :)
[06:15:46] <Mr_Sheesh> Sad but true!
[06:16:19] <Lambda_Aurigae> how good or bad is the quartus-II software from altera?
[06:16:44] <Xark> Lambda_Aurigae: Good, I'd say.
[06:16:58] <Lambda_Aurigae> grabbing that now.
[06:17:43] <Xark> Lambda_Aurigae: Cool. You can code and simulate with that even without hardware (to get a feel). :)
[06:17:58] <Lambda_Aurigae> awesome.
[06:18:34] <Xark> One tip... if you are getting 15.0, I suggest cancel and get 15.0.2 :)
[06:18:52] <Xark> (Click on "available updates" button). :)
[06:19:10] * Xark notes 15.0.0 had a few crash issues...
[06:19:17] <Lambda_Aurigae> 22.7GB!
[06:19:18] <Lambda_Aurigae> sheesh.
[06:19:36] <Lambda_Aurigae> glad I upped my speed to 10Mb/s a while back.
[06:21:15] <Lambda_Aurigae> only 9 hours.
[06:21:37] <Lambda_Aurigae> looks like it is 15.0.0.145 and there are updates.
[06:23:51] <Xark> Yeah, cancel and get 15.0.2.x IIRC
[06:24:10] <Lambda_Aurigae> this says you have to install the base first and then the update.
[06:24:18] <Xark> Wrong
[06:24:25] <Lambda_Aurigae> that's what it says!
[06:24:26] <Lambda_Aurigae> hehe
[06:25:11] <Lambda_Aurigae> the update is half the size of the base software package.
[06:26:18] <Xark> I think you want this http://dl.altera.com/?edition=web&platform=windows&download_manager=direct#tabs-5 Quartus-web-15.0.2.153-windows.tar or Quartus-web-15.0.2.153-windows.tar
[06:26:51] <Xark> (make sure you click "direct download" and click on "updates available")
[06:27:10] <Lambda_Aurigae> yeah..if you switch to linux it has the 15.0.0 as the download...and 15.0.2 as an update.
[06:27:20] <Xark> You DO NOT need to get base then update. :)
[06:27:21] <Lambda_Aurigae> where windows has 15.0.2 as the main download.
[06:27:43] <twnqx> linux users obviously have superior bandwidth
[06:27:50] <Lambda_Aurigae> dunno..
[06:28:04] * twnqx pats hist 100mbit/s line
[06:28:04] <Lambda_Aurigae> just not seeing 15.0.2 as a download by itself but as an update only.
[06:28:29] <Xark> Keep clicking. I downloaded it the other day, and just now found the link. :)
[06:28:53] <twnqx> for windows
[06:28:57] <Xark> http://download.altera.com/akdlm/software/acdsinst/15.0.2/153/ib_tar/Quartus-web-15.0.2.153-linux.tar (for me)
[06:29:07] <twnqx> oh
[06:29:12] <Lambda_Aurigae> aahh way at the bottom of the update page.
[06:29:32] <Xark> It is not you, it is the F-ed up Altera download page. :)
[06:30:03] <Lambda_Aurigae> got it...
[06:30:10] <Xark> twnqx: No, for both (I am not "Windows only"). :)
[06:30:13] <Lambda_Aurigae> 15.0.2.153
[06:30:17] <Xark> Cool. :)
[06:30:26] <Lambda_Aurigae> 7.5GB
[06:30:32] <Xark> I think I just saved you a few GB of DL. :)
[06:30:51] <Lambda_Aurigae> I had already done that by cutting out a bunch of the supported processors.
[06:31:09] <Lambda_Aurigae> I pay a flat rate with unlimited bandwidth though so no biggie..just will get it a little faster.
[06:31:16] <Lambda_Aurigae> down to 2 hours now.
[06:31:33] <twnqx> ISE is not much smaller :/
[06:31:38] <twnqx> and can't be cut down iirc
[06:31:42] <Lambda_Aurigae> ISE?
[06:31:47] <twnqx> xilinx' tool chain
[06:31:52] <Xark> Yeah, Arria is 1/2 GB right there you re not likely to need.
[06:32:29] <twnqx> and then all i do is ignore most of their stuff and use compiler, mapper etc from Makefiles...
[06:33:10] <Xark> twnqx: Yep. :)
[06:33:38] * Xark just got a nice makefile setup for FPGAs (and I like it vs IDEs). :)
[06:33:52] <twnqx> i hate how all the IDEs clutter you source trees
[06:34:34] <Lambda_Aurigae> think I might need ye olde ide for a little bit to get started.
[06:34:44] <Lambda_Aurigae> I'm getting old, doncha know.
[06:34:57] <Xark> twnqx: Yeah, sucks bad when you are trying to use source control.
[06:35:14] * Xark plugs ears
[06:35:17] <twnqx> that moment when your .gitignore is larger than your verilog files :P
[06:35:19] <Xark> LALA-LALALALA
[06:35:34] <Xark> :D
[06:36:36] <Lambda_Aurigae> what's the difference between the quartus web edition and subscription edition?
[06:36:58] <twnqx> one is free and the other is paid for? :>
[06:37:04] <Xark> Not sure exactly. Never paid. :)
[06:37:50] <Xark> Supports more expensive FPGAs and more IP blocks (I think).
[06:38:23] <Xark> Also, perhaps better simulator (vs "Starter edition").
[06:43:18] <Lambda_Aurigae> lots of hacking to get this to run on ubuntu?
[06:45:38] <Xark> No, installed cleanly for me.
[06:46:06] <Xark> Even USB JTAG worked (with DE0-Nano and BEMicro-CV).
[06:47:16] <Xark> 10.04 LTS (last weekend)
[06:58:04] <Lambda_Aurigae> ooo...fpga and vhdl channels..hehe
[07:00:45] <Xark> Yep. :)