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[01:41:24] <Haohmaru> to read a byte from SPI, you have to write a dummy byte to it, is that right?
[01:51:29] <Thrashbarg> correct
[01:54:21] <Haohmaru> i then poll the SPI_IF_bm flag.. what if the slave is not there at all
[01:54:31] <Haohmaru> like.. the slave chip is completely removed
[01:54:44] <Haohmaru> will my program wait forever on that flag?
[01:55:50] <Thrashbarg> if the chip is removed and you clock in data, it'll clock in whatever it sees on the bus. If you have a pullup resistor it'll clock in 0xFF
[01:56:32] <Haohmaru> so reading and writing to SPI will not freeze my program if the slave chip is not present?
[01:57:40] <Thrashbarg> yeah. The SPI bus works blindly for the most part. IIRC that flag changes when the internal shift register is ready, not when the correct data appears
[01:58:02] <Thrashbarg> because correct data could be anything, so it can't decide on that
[01:58:08] <Haohmaru> ah, gud
[02:43:12] <LeoNerd> SPI itself cannot detect the absence of the slave; I2C can
[02:45:13] <Haohmaru> yeah.. you can do it if the slave has query/reply commands
[02:45:24] <Haohmaru> like read status command on an eeprom
[02:45:41] <Haohmaru> or hm..
[03:04:21] <Valen> sould you put a weak pull up or down in there?
[03:04:29] <Valen> as I recall SPI idles low or something?
[03:09:08] <Haohmaru> you mean on the MISO?
[04:03:16] <|ZuLuS|> hello i have quesiton about i2c eeprom
[04:04:18] <|ZuLuS|> im trying to save data to it .. but my question is there some way to make it wthout overwrite exsisting data after restart
[04:15:43] <LeoNerd> Hmmm? That question doesn't seem to make sense
[04:16:01] <LeoNerd> An external I2C-attached EEPROM doesn't know when your microcontroller resets
[04:22:33] <Haohmaru> maybe he means to continuously add/append data to it, and in case of a reset - continue from the address where it was before that (and not from address zero)
[04:22:39] <Haohmaru> but i'm just guessing
[04:22:56] <Haohmaru> btw, where is teh nop() macro defined? :/
[16:49:56] <Jartza> https://scontent-fra3-1.xx.fbcdn.net/hphotos-xtf1/v/t1.0-9/11750678_10152899538862854_3651755179614992724_n.jpg?oh=448d1d6e03ab3c5032eb77e98632492a&oe=5650F354
[16:51:27] <learath> that's a lot of tagsu
[16:51:41] <Strangework> gosh
[18:22:53] <day> i just stumbled across the TI msp430f1121a. thats one interesting uC
[18:23:22] <LeoNerd> MSP430. Is that the 8pin DIP one, that's still a 32bit ARM?
[18:23:38] <day> i think 5 different low power stages. from low to insanely low
[18:23:45] <day> 20pins
[18:24:03] <day> external interrupts on all gpio pins
[18:24:33] <day> the flash is very small though
[18:24:57] <LeoNerd> Hrm... no I2C, SPI or UART
[18:25:06] <day> well it has jtag
[18:25:44] <day> its obviously not a atmega88 replacement. its kinda special
[18:26:15] <day> oh and its 16bit
[18:27:12] <day> and it costs almost 3EUR O.O. they seriously used that thing in a simple wireless button that im reverse engineering atm
[20:55:40] <Hexum064_2> Hey all
[20:56:05] <Hexum064_2> can someone explain exactly what the RESET bit in the DMA Channel CTRLA register does?
[20:56:09] <Lambda_Aurigae> http://chuckleaduck.com/comic/keep-looking/
[20:56:25] <Lambda_Aurigae> ummm...it's not in the datasheet?
[20:57:03] <Hexum064_2> It just says it resets the DMA channel.
[20:57:23] <Lambda_Aurigae> guessing this is an xmega thing.
[20:57:29] <Hexum064_2> but it doesn't do anything if the channel is enabled. So what does it do?
[21:01:38] <Lambda_Aurigae> dunno..don't even see a reference to it in my one and only xmega document.
[21:01:48] <Lambda_Aurigae> guess it's in one of the other docs I don't have.
[21:02:26] <Hexum064_2> lol
[21:02:34] <Hexum064_2> well, thanks for looking
[21:02:48] <Lambda_Aurigae> I don't do xmega due to not having any to play with.
[21:03:41] <Lambda_Aurigae> what chip are you working with exactly?
[21:04:04] <Hexum064_2> 128a3u
[21:05:21] <Lambda_Aurigae> grabbing manual.
[21:08:54] <Lambda_Aurigae> CTRLA doesn't have a reset bit.
[21:09:23] <Lambda_Aurigae> oh..duh.
[21:09:26] <Lambda_Aurigae> the dma ctrla
[21:09:41] <Lambda_Aurigae> multiple ctrla registers in this dang thing.
[21:09:44] <Hexum064_2> yes
[21:10:50] <Lambda_Aurigae> When a DMA channel is reset, all registers associated with the DMA channel are cleared. A software reset can be done
[21:10:50] <Lambda_Aurigae> only when the DMA channel is disabled.
[21:10:59] <Lambda_Aurigae> second paragraph, section 5.10
[21:11:15] <Lambda_Aurigae> of doc8077.pdf the atmega A series documentation.
[21:12:49] <Lambda_Aurigae> found by reading the table of contents on the pdf and seeing section 5.10 Software Set and doing a bit of word association.
[21:12:56] <Lambda_Aurigae> section 5.10 Software Reset
[21:13:08] <Hexum064_2> Right, I read that. So I was trying to make sure. It sounds like the only thing that the reset does is clear the registers.
[21:13:20] <Lambda_Aurigae> that's exactly what it says.
[21:13:32] <Lambda_Aurigae> that particular bit resets just the registers for that channel.
[21:13:47] <Hexum064_2> It just weirds me out because I can't think of a use case.
[21:13:59] <Lambda_Aurigae> there is another bit somewhere to reset the entire dma controller, meaning reset all registers associated with the dma controller, including all channels.
[21:16:18] <Lambda_Aurigae> probably the CTRL - Control Register, +0x00, bit 6.
[21:16:32] <Hexum064_2> Yes
[21:16:37] <Hexum064_2> that's correct
[21:17:43] <xrlk> This is bullshit - you're oversimplifying a complex situation to the point of no longer adding anything useful to the discussion.
[21:18:35] <Lambda_Aurigae> so add something useful.
[21:19:12] <Hexum064_2> who is he talking to?
[21:19:20] <Lambda_Aurigae> me probably.
[21:25:51] <Tom_itx> i'll assume he posted to the wrong channel and move on for now. he wasn't part of the active discussion anyway
[21:27:22] <Hexum064_2> yes, agreed
[22:42:34] <tis_me> does anyone know a good technical email list?
[22:42:54] <tis_me> ...for AVR development
[22:44:13] <Hexum064_2> sry. np
[22:44:14] <Hexum064_2> no
[23:06:48] <tis_me> I've found "avr-gcc-list" and "avr-chat", but their are either GCC or non-technical oriented.
