#avr | Logs for 2015-03-11

Back
[01:05:59] <rue_bed> DKordic, is it like recursive code where the start of the function is executed after the end?
[06:43:00] <georgeous> Looking for paid work? Graphics designer and a mobile website developer required, pm me please. Comes with free accommodation in Spain!
[06:44:03] <Lambda_Aurigae> georgeous, go advertise your spam elsewhere.
[07:42:29] <DKordic> rue_bed: No :) . I don't understand what You mean. I was refering to ``if (n == 0) PORTB = 0''.
[13:14:05] <mark4> can someone explain the external ram on the XMEGA-A1 Xplained kit? the documenatation says its 8 MB of 4bit memory
[13:14:16] <mark4> does that mean a byte fetch takes two physical fetches?
[13:40:49] <timemage> mark4, from what i can tell that's what i'd expect.
[13:44:51] <timemage> mark4, http://www.avrfreaks.net/forum/xplained-schematic follow the link to the schematic. i dunno why it needs to be this hard to find this material. anyway, you can see the sdram to the right of the mcu. four data lines.
[16:54:19] <mark4> timemage i didnt think to search avrfreaks lol i looked in the oficial documentation and couldnt see anything to indicate read requirements, they are as bad as TI for scattering the relevant information to the 4 winds (ok maybe not as bad)
[16:55:53] <timemage> mark4, i only sort of know what you mean about ti. been playing with msp430 recently and they have broken the documentation into family related stuff and chip specific stuff. it makes some sense that they didn't want to update the information in many datasheets.
[16:56:00] <mark4> putting 4 bit memory on there makes the external ram of limited use for an 8 bit device :/
[16:56:42] <mark4> timemage i still have the old HARD copy documentation for MSP430, back when they still printed in those yellow books :)
[16:57:16] <mark4> i lost a job because i couldnt get some peripheral working on a TI dsp. i went through the documentation for that peripheral over and over and over and over and... your fired!
[16:57:16] <timemage> mark4, yeah, although i think it was a practical tradeoff with the fact that you have dram rather than sram. if it'd been sram, you wouldn't need all the extra signals for what amounts to a dram controller built into the xmega.
[16:57:53] <mark4> there was this one little bit in this other register documented in a totally separate document that... if you didnt set that bit the pripheral wouldnt work
[16:58:11] <mark4> i forget the exact details but it was seriously annoying. i wont use anything TI any more
[16:58:24] <timemage> mark4, our princess is in another castle?
[16:58:32] <mark4> ?
[16:58:38] <timemage> mark4, nevermind.
[17:05:38] <mark4> im looking at getting either the XMEGA-A3Bu or the XMEGA-A1
[17:06:30] <mark4> the A3BU does not have the external ram but does have external data flash. i think it would be more useful if the external ram could be executable too
[17:06:39] <mark4> which it isnt :/
[17:07:48] <mark4> if the ram had been 8 bit i could have used it but 4 bit is just stupid even if the processor performs a double read to fetch a byte