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[00:34:01] <rue_bed> vsync_, were you the one interesteed in my tcp comm programs?
[00:34:12] <rue_bed> Tach[Zzz], asleep already?
[00:35:12] <rue_bed> is everyone asleep?
[05:25:43] <M1k3y> Hi there. Short question about interrupt handling. The chip is an ATtiny167, the code is in asm. I'm using nested interrupts, and it's important to activate interrupts as fast as possible if int1 occurs. Would the following Code work? First is the normal version, second the one I'm not sure about.
http://pastebin.com/PG5ANGA1
[08:34:01] <LeoNerd> Well, this is awkward. Today I'm having trouble reading my pressure/temperature sensor. I'm sure it used to work
[08:34:17] <LeoNerd> I can reliably get numbers out of it, but the numbers I'm getting are silly.. It thinks the room is about 100C and 120kPa
[08:34:24] <LeoNerd> Clearly nonsense, because I'm able to survive in it :)
[08:34:46] <LeoNerd> It's an I2C sensor, so I don't think there's anything weird going on like analog circuit or ADC..
[08:39:06] <LeoNerd> Ah. oops. I was powering it at 5V instead of 3.3V
[08:39:09] <LeoNerd> Amusingly it didn't break,
[08:48:31] <twnqx> LeoNerd: are you a diamond?
[08:50:05] <LeoNerd> I don't believe so. I managed to scratch myself on a steel pin
[08:50:47] <LeoNerd> Also I'm sure you need a lot more than 120kPa at 100C to make diamond
[09:33:18] <LeoNerd> How come there's like a billion different breakout boards that combine a DS1307 (RT clock) with AT24C32 (I2C eeprom)? I just want the RTC
[13:19:54] <awozniak> can the atmega 2560 SPI be set for nonstandard word sizes? I'm trying to interface to an eeprom that requires a start bit, a two bit opcode, and then N 8 bit values.
[13:20:28] <LeoNerd> In that situation, I'd send the start and opcode bits by bitbanging the IO lines, then use the SPI hardware for the remaining 8bit words
[13:21:23] <awozniak> ugh, not the answer I was hoping for. Thanks LeoNerd.
[13:21:46] <LeoNerd> Bitbanging 3 bits as a one-off isn't hard
[13:25:21] <aczid> is there a separate channel for avr-libc/avr-gcc development? I'm trying to figure out why ioreg.pl doesn't generate as much output as is in other files in crt1/iosym
[13:31:52] <Casper> anyone here know attiny85 wekk?
[13:32:12] <zerowidth> wekk?
[13:33:01] <Casper> err
[13:33:06] <Casper> what did I wrote there?
[13:33:15] <Casper> oh yeah well!
[13:33:24] <zerowidth> what about the attiny85 though?
[13:33:48] <Casper> basically, I'm at work, so can't dig deeply in the datasheet and need to pass the order today
[13:34:04] <Casper> PWM on it
[13:34:26] <Casper> I need 3 PWM output
[13:34:54] <Casper> just want to be sure that the 3 can be used simultaniously
[14:44:36] <Tekkkz> hi, anybody here who can help me find my mistake at setting up timer0 in ctc mode on an atmega328p ?
[14:45:23] <LeoNerd> Show your code, and maybe we can
[14:45:28] <Tekkkz> 10 void init_timer(void){
[14:45:30] <Tekkkz> 11 TCNT0 = 0;
[14:45:32] <Tekkkz> 12 OCR0A = 0xff;
[14:45:32] <Willd> Ehm
[14:45:34] <Tekkkz> 13 TCCR0A = _BV(COM0A0) | _BV(WGM01) | _BV(CS01);
[14:45:36] <Tekkkz> 14 }
[14:45:52] <LeoNerd> Preferrably not by raw pasting it into the channel :P
[14:46:04] <Tekkkz> => to set up the timer to ount to 255 and at f_cpu/8 steep
[14:46:07] <Tekkkz> *speed
[14:46:21] <Tekkkz> but the port pd6 doesnt get toggled
[14:46:39] <LeoNerd> That doesn't sound like the set of bits required for CTC mode
[14:46:46] <Tekkkz> ?
[14:46:50] <LeoNerd> The bits I have here are WGM12, in the *B register
[14:47:21] <LeoNerd> Er.. WGM02 even. for timer 0
[14:47:30] <Tekkkz> y
[14:48:18] <LeoNerd> Ah... though I was reading a different chip sheet..
[14:48:26] <Tekkkz> ah ok
[14:48:37] <Tekkkz> so whats then the mistake by me?
[14:48:47] <LeoNerd> OK so CTC is mode 2, is WGM01 indeed, in register A
[14:49:23] <LeoNerd> To toggle on counter match
[14:49:36] <LeoNerd> Have you remembered to set the pin mode in DDR?
[14:49:44] <Tekkkz> yes
[14:49:52] <LeoNerd> "However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
[14:49:53] <LeoNerd> must be set in order to enable the output driver."
[14:49:54] <LeoNerd> Hmm
[14:50:02] <LeoNerd> Well, is the CPU otherwise running?
[14:50:16] <Tekkkz> is pd 6 correct?
[14:53:58] <Tekkkz> ?
[14:59:18] <LeoNerd> OC0A?
[14:59:36] <LeoNerd> Seems to be
[15:17:30] <Tekkkz> http://ix.io/gHE
[15:17:54] <Tekkkz> here, i tryed to use timer1 (16 bit timer) with oc1b as output, doesnt work
[15:52:08] <LeoNerd> Ah, oops. I just ordered a DS1307. That's the RTC chip that *doesn't* have the alarm interrupt.
[15:52:25] <LeoNerd> I guess I'll just have to maintain my own clock
[21:54:06] <Casper> hmmm that seems almost too easy...
[21:54:49] <Casper> making my own serial protocol...
[21:55:00] <Casper> and it look too easy... something must be wrong :D
[22:43:03] <Casper> so, if I want 20kbit, I have 1000 cycles per bit... if I want to have lots of margin, a bit should last 500 cycles, which will allow a 50% speed mismatch... not too bad
[22:48:59] <learath> Casper: taht's.. not how it works
[22:49:12] <learath> (unless you are doing clock recovery)
[22:50:29] <JoeLlama> orkee dorkee Casper :)
[22:50:29] <Casper> 1wire inspired
[22:50:46] <JoeLlama> tv time (: afk for a bit
[22:51:37] <Casper> low, delay, bit, delay, delay = 1000 cycles
[22:51:54] <Casper> resync will be low, delay :D
[22:51:56] <learath> yeah but that works for *one* bit
[22:52:01] <Casper> yup
[22:52:20] <Casper> will probably send 40 bits at once
[22:52:31] <Casper> and bump up the speed
[22:52:44] <learath> it's totally doable, but requires a pretty complex coding scheme
[22:53:01] <learath> which in turn requires quite a few cycles to process
[22:53:17] <Casper> do you have another idea of a 1 wire unidirectional, 1 master, several slave, with no precise clock on each devices?
[22:53:30] <Casper> I have tons of time to spare
[22:54:29] <learath> Casper: well, what comes to mind, run the clock at twice the data rate
[22:54:35] <learath> http://en.wikipedia.org/wiki/Differential_Manchester_encoding
[22:55:01] <learath> that gets you clock + data
[22:55:16] <learath> and, as you suggested, your sync can be awful
[22:55:42] <learath> the only trick is initial sync
[22:55:48] <Casper> I looked at it, but it look like it need a 3 voltages signal
[22:55:57] <learath> eh?
[22:56:34] <learath> you have high and low
[22:58:39] <Casper> oh I see part of an unexplained thing
[22:59:00] <Casper> the sync part
[22:59:59] <Casper> the doc I initially found was showing an idle at 0, and data at +1 and -1
[23:00:07] <Casper> no sync
[23:00:09] <learath> that's somethihng different
[23:00:43] <Casper> hmmm might check manchester more
[23:00:56] <Casper> I have no hardware uart there
[23:01:00] <Casper> so all need to be done in software
[23:01:18] <learath> manchester (or differential manchester, or manchester variant #8i57) are all pretty easy
[23:01:27] <learath> they were written eons ago
[23:01:34] <learath> invented? created? whatever
[23:02:29] <Casper> http://i.imgur.com/yg6JskC.png <=== that's the actual circuit
[23:02:38] <Casper> "ideal" chip...
[23:03:29] <learath> few mhz chip?
[23:03:43] <Casper> 20MHz
[23:03:56] <learath> and you need 20khz, manchester will be trivial
[23:04:04] <learath> I'd probably wire it as an interrupt
[23:04:13] <learath> if you can do a transition interrupt
[23:04:15] <learath> no clock at all
[23:04:26] <learath> eh. I take that back. almost no clock :P
[23:04:29] <Casper> I have no spare timer, which cause issue
[23:04:40] <learath> oh. that's tricky.
[23:04:48] <learath> what are your timers doing?
[23:04:57] <Casper> PWM
[23:05:21] <Casper> I could rewrite it to use a single timer and do software PWM... but... unsure
[23:05:35] <learath> how many timers do you have? 2?
[23:05:52] <Casper> 2 timers with 2 channels pwm on each (1 unused)
[23:06:12] <learath> hmm. and you need 3 pwm channels?
[23:06:14] <Casper> I plan to PWM at ~200Hz to avoid visible flicker
[23:06:18] <Casper> yupo
[23:06:24] <Casper> RGB leds
[23:07:02] <Casper> the code will be quite simple...
[23:07:51] <learath> man that's a tiny tiny chihp
[23:07:55] <learath> try a software pwm?
[23:08:15] <learath> I think, at 200hz, software pwm will be *fine*
[23:08:32] <Flipp_> huh. kinda surprised at the price of a 2560... thought it would have been less than $17
[23:08:34] <Casper> master unit, look at ADC data (connected to LDR), is there sun? if no continue, if not loop. Look at pattern table, set itself to pattern 1, transmit the other pattern to the other units. Check back light, if sun then set off, transmit all off
[23:09:03] <learath> you probably want to build in a lot of momentum to the "is there sun" check
[23:09:06] <Casper> slave unit, listen to data, is byte 1 == self address? then store next 3 bytes as PWM value, wait till next data packet
[23:09:12] <Casper> yeah
[23:09:16] <learath> maybe a gradual ramp
[23:09:20] <learath> that'd be pretty
[23:09:27] <Casper> that's a plan
[23:09:36] <learath> just so a random headlight does not flip it off
[23:09:37] <learath> or something
[23:09:49] <Casper> I actually plan to send an address, followed by brightness, followed by RGB value
[23:10:07] <Casper> the device will then do brightness * R, brigtness * B ....
[23:10:25] <Casper> and yes, I will filter
[23:10:33] <learath> heh was about to suggest :)
[23:10:47] <learath> RGB all driven at the same power is not quite right :)
[23:11:05] <learath> although sometimes you get lucky
[23:11:18] <Casper> depending on how much power I will have, I might also do it brighter initially, then lower as the sun goes down
[23:11:27] <Casper> but exact color isn't important
[23:11:39] <Casper> I plan to make it change color constantly
[23:11:58] <Casper> the stripe I used is already blueish, but the purple is quite pretty :D
[23:12:08] <learath> cool
[23:17:21] <Casper> hmmm manchester.... sound more complicated than the modified 1 wire....
[23:20:56] <Casper> the modified 1 wire... wait until bus goes low, sample X times. If "0" samples = samples count then bitcount=0; else shift, bitcount++, if "0" samples > 1/3 count then add 1. If bitcount = 32 then do stuff
[23:22:31] <Casper> random errors shouln't matter too much, as I plan to send like 10 updates/second
[23:48:08] <Casper> learath: it's still funny that this tiny tiny tiny one still have a 230 few pages datasheet :D
