#avr | Logs for 2013-10-11

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[06:56:21] <pingo> Does anyone know the name of this connector http://shrani.si/f/1T/kY/33WejJdS/connector.png
[09:09:35] <rue_house> oh the sloted ones
[09:10:19] <rue_house> browse digikey?
[10:05:51] <Phantom> rue_house: do you remember flyback's old nick? fishhead? https://www.youtube.com/watch?v=tvaKfMFoNcI#t=36s ← that reminded me of it :D
[10:12:52] <t4nk110> hello
[10:12:58] <t4nk110> any one
[10:13:00] <t4nk110> ?
[10:13:00] <t4nk110> ?
[11:10:54] <tzanger> afternoon everyone
[11:51:55] <RikusW> http://gagabla.com/story/view/166
[12:12:09] <dsan> when I set an AVR as SPI-slave, I don't have to define the speed, right?
[12:14:41] <twnqx> no
[12:14:45] <N1njaway> Just need to ensure the clock speed of the AVR is at least 4x that of the SPI bus
[12:14:53] <dsan> thanks a lot
[13:27:49] <dnsak> does an atmega168 have to have SS pin connected in order to use SPI?
[13:28:05] <dnsak> or can it be used on 3 wire SPI?
[13:32:16] <N1njaway> As a master or slave?
[13:32:27] <dnsak> as a slave
[13:33:28] <N1njaway> I believe you would want to use SS as the slave select in that case.
[13:34:34] <N1njaway> I've only done SPI as a Master from the AVRs. The only major gotcha with that is that you HAVE to set SS to be an output, or you have to tie the pin high. If SS goes low during master transactions, it will abort. Very tricky one to track down if you leave the pin floating as an input as the behavior will become unreliable :)
[13:34:34] <dnsak> N1njaway, I have an embedded board that does not have SS pin, in that case, would it be fine to just set SS pin as output and set to logic high?
[13:35:03] <N1njaway> SS should function as your Chip Select for the slave
[13:35:57] <N1njaway> You need a chip select (to delineate targets as well as to provide framing), the clock that comes from the master, and then the MISO/MOSI pairs to shift data around. Or only MOSI if the Atmega won't talk back.
[13:36:11] <N1njaway> The Atmel datasheet is very thorough in detailing all of this.
[13:36:22] <dnsak> I just send data from master to AVR (slave)
[13:36:38] <N1njaway> Then you should only need the three connections.
[13:36:39] <dnsak> but I had not used the SS pin as I don't have it on the master
[13:36:53] <dnsak> in that case, AVR has problem to receive the data
[13:37:07] <dnsak> I set the SS as output and logic high, it seems fine now
[13:37:09] <N1njaway> Generally the SS/CS connection is going to be associated through a GPIO pin on your master.
[13:37:39] <N1njaway> You have to be able to provide a chip-select to the SPI slaves in order to provide transaction framing.
[13:38:02] <N1njaway> i.e. when CS goes low, that resets the slave to receiving byte #0 as the next byte about to flow on the SPI bus.
[13:38:35] <dnsak> if I set CS high all the time, do you think it may cause any problem?
[13:38:37] <N1njaway> It also ensures that the internal state machine for bit sync with the master for the CLK lines is reset.
[13:38:41] <N1njaway> Yes, a lot of them.
[13:39:26] <N1njaway> SPI needs the CS line for framing and reset purposes, as I had mentioned, in all but the most trivial/specialized uses.
[13:40:12] <dnsak> I see, thank you very much
[13:40:29] <N1njaway> Check out the Atmel data sheet. It's very good at explaining how to configure the parts. :)
[13:40:55] <dnsak> yeah I read it but I was not sure it is obligatory to use SS pin or not
[13:41:05] <dnsak> thank you again for the help :)
[13:41:11] <N1njaway> Sure thing. Good luck!
[13:58:45] <abcminiuser> So, anyone trying my MarginOfError extension?
[13:58:58] <abcminiuser> Want to make sure it works on others' systems before I upload to the gallery
[14:03:51] <Casper> I'll pass on your trojan :D j/k
[14:09:50] <abcminiuser> Aww
[14:09:54] <abcminiuser> No easter eggs this time
[14:24:26] <abcminiuser> Ah well, test in production I guess
[22:19:27] <Casper> rue_house: boo