#avr | Logs for 2013-07-09

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[03:29:16] <kizmoo> helou evryvan
[04:08:40] <kizmoo> kupim karavan
[04:15:56] <R0b0t1> hello
[04:44:32] <kizmoo|> g
[05:50:47] <jwhitmore> hello all, new here moving to avr embedded but develop on Linux machines as opposed to Windows. Just wondering are there any specific IRC or mailing lists for dev on Linux. To get started I used info here:
[05:50:48] <jwhitmore> http://www.linuxjournal.com/article/7289?page=0,2
[05:54:48] <specing> this one?
[05:55:57] <jwhitmore> specing: cheers I was thinking this one might be populated with Windows people who might consider Linux chat noise.
[05:56:49] <specing> on a FOSS project chat network? I don't think so...
[05:57:57] <jwhitmore> specing: ;-) that's a very good point and I should really have thought of it. Who knows surely even the Windows heads are using avr-gcc
[05:59:04] * RikusW and specing are using Linux :)
[05:59:44] <specing> jwhitmore: indeed
[06:00:05] <specing> there are quite a few BSD people here, as well
[06:00:09] <RikusW> we consider W chat noise :-P
[06:01:22] * RikusW boots XP in a VirtualBox ;)
[06:01:38] <RikusW> really
[06:02:05] <specing> No love for Qemu?
[06:02:05] <twnqx> i think there are tons of "windows people" here
[06:02:23] <specing> twnqx: its the OndraSwarm
[06:02:31] <specing> *effect
[06:02:55] <jwhitmore> So then to a question. As I said I used that linux journal article to get everything installed. Bit out of date but got all installed. The only thing is that it uses a Makefile which my Install don't like. To be fair there is no target in that makefile so I can understand the error. I'm just wondering is the "MCU=at90s8515" directive in that Makefile still upto date
[06:03:26] <twnqx> IF your MCU is an at90s8515, then yes...
[06:04:17] <RikusW> thats a fairly old AVR
[06:04:19] * twnqx uses MCU = at90can128 :P
[06:04:41] <specing> ^ avr in a can
[06:04:45] <jwhitmore> twnqx: Just the one I want but I'm waiting for my dev board and just happy to see an a.out
[06:05:04] <RikusW> gcc uses elf
[06:05:10] <twnqx> so what
[06:05:21] <twnqx> a.out is still the default name if you didn't supply something more sane
[06:05:21] <RikusW> a.out is as outdated as at90s....
[06:05:29] <specing> jwhitmore: that one is ancient, go for a newer one
[06:05:39] <specing> mega168 or 328
[06:05:46] <specing> is immensely popular
[06:05:52] <RikusW> look into the ATmega series
[06:05:52] <twnqx> and immensely overpriced
[06:06:04] <specing> 328 is actually quite cheap
[06:06:06] <jwhitmore> Thanks all I'll be using MCU=at90can128 then and trying to get my code compiling
[06:06:12] <RikusW> mega324 is 40 pin
[06:06:20] <twnqx> you're going for that chip?
[06:06:20] <RikusW> or mega32A
[06:06:25] <jwhitmore> Not looking for cheap looking for CAN
[06:06:31] <twnqx> lol ok
[06:06:40] <specing> Now those 40 pin DIPs are expensive
[06:06:50] <twnqx> so anyway, you replace the MCU = with whatever chip you are using
[06:07:26] <jwhitmore> It's been a while so I'll have to do a bit of reading up on Makefiles again.
[06:07:27] <specing> jwhitmore: also look into atmega{16,32}u2
[06:07:27] <RikusW> specing: I got lucky, got some 324A's for 3 Euro each
[06:07:34] <specing> RikusW: 0.o
[06:07:38] <specing> RikusW: lucky bastard.
[06:07:41] <RikusW> was cheaper than the 328P at the time
[06:08:35] <RikusW> specing: 32u2 seems to be pricier these days, 32u4 maybe ?
[06:09:51] <jwhitmore> my next headache is going to be when my Development board arrives and I have to start using the Atmel ISP programmer. I've a few days to play with Makefiles
[06:09:54] <RikusW> RS now charges 5E for 324A...
[06:10:17] <RikusW> jwhitmore: which dev board is that ?
[06:12:00] <jwhitmore> http://www.atmel.com/tools/ATDVK90CAN1.aspx
[06:12:34] <jwhitmore> Pricey but in panic mode
[06:12:58] <jwhitmore> working on an idea for Global Domination 1.0 ;-)
[06:15:10] <jwhitmore> Right have to pop out. Thanks a million for all your hospitality and help.
[06:16:13] <RikusW> jwhitmore: do you have a STK500 too ?
[06:16:24] <RikusW> that seems to fit on top of a STK
[06:56:00] <antto> what should be done with unused pins?
[06:57:16] <antto> pins/ports however they are called
[06:58:35] <twnqx> i keep them as input
[06:58:53] <twnqx> mostly with pullup enabled
[06:59:06] <twnqx> cmos likes defined states :P
[07:00:17] <antto> DDRx = 0x00; PORTx = 0xFF; ?
[07:00:52] <twnqx> yeah
[07:01:31] <twnqx> (i'd like to hear more oppinions on that, too, btw)
[07:01:51] <antto> okay, now i gotta figure out how many ports there are :/
[07:02:27] <antto> will the compiler warn me if i try to set some PORTx which is not present on the actual chip?
[07:03:21] <twnqx> io.h will not have them defined
[07:03:27] <twnqx> so you should get a compiler error
[07:03:59] <antto> i cannot tell from the datasheet
[07:04:38] <antto> in the code i have, only port A to E are initialized
[07:10:13] <antto> A to G actually
[07:34:58] <kdehl> Anyone has experiences with the X1541 for Commodore 64?
[07:35:00] <kdehl> If so, it's only possible to use this one to connect floppy drives to the parallel port of the PC, but not connect a Commodore 64 to the PC with it?
[07:55:55] <jadew> http://www.freerider.ro/wp-content/uploads/2013/07/politie_locala_timisoara_biciclete.jpg
[08:00:35] <jadew> I just learned that that's normal in most countries, so scratch that
[08:00:39] <jadew> terribly funny in mine
[08:01:36] <RikusW> will save a lot of petrol
[08:02:01] <jadew> yeah
[08:30:30] <yomanurock> can anyone please tell me how to loop until a bit is clear
[08:30:55] <antto> while (bit_is_not_clear)
[08:31:29] <yomanurock> how do i use that for one single pin?
[08:31:58] <yomanurock> i want to loop until my PB7 was clear
[08:32:26] <antto> you can isolate just one bit using the bitwise AND op
[08:32:37] <yomanurock> k thanx
[09:08:29] <Valen> jadew: a push bike here (australia) is sometimes (or was) called a poke, so we have pigs on pokes
[09:09:52] <jadew> heh
[09:52:24] * l9 Just ordred a Metcal mx-5200 soldering station :)
[10:29:40] <RikusW> It seems the MVS0409 vibration sensor is very sensitive....
[11:12:10] <R0b0t1> RikusW, it is listed as "micro vibration sensor" :P
[11:14:22] <R0b0t1> Is it moving ball type?
[11:16:07] <RikusW> yes
[11:16:37] <RikusW> even holding it in my hand sends the text scolling in the terminal...
[11:17:06] <RikusW> I log a line per pinchange showing the time in us
[11:17:11] <braincracker> h
[11:17:58] <braincracker> abcminiuser <= is twen enabled by default on portc in atmega168p ? i have a non responsive port currently
[11:18:50] <abcminiuser> It's physically in the chip, but turned off by default
[11:19:31] <braincracker> ds says default 0
[11:19:47] <braincracker> i can't turn on portc5 apparently now
[11:20:03] <braincracker> i don't think i have esd'ed the port, chip is brand new
[11:26:30] <braincracker> PORTC ^= (uint8_t)~0; this seems to work
[11:26:48] <braincracker> now trying one-by one
[11:31:32] <abcminiuser> JTAG fuse
[11:31:42] <RikusW> 168p got dW
[11:43:45] <RikusW> probably TWI settings locking C5
[12:07:20] <megal0maniac> RikusW: I ended up buying a length of RF cable, cut the core out and stuck it in the connector. It's a bit wider on the one end from the sidecutters so it isn't going anywhere :)
[12:07:36] <megal0maniac> http://i.imgur.com/LccJ2TJ.jpg
[12:08:25] <megal0maniac> Archaic, but it will do
[12:09:00] <megal0maniac> Now I'm drilling holes in my wall :) Surface mounting ALL the network gear
[12:09:10] <megal0maniac> s/surface/wall
[12:12:28] <RikusW> that should work :)
[12:14:53] <megal0maniac> R15.50 excl /m for the cable :/
[12:14:54] <braincracker> thanks
[12:15:17] <braincracker> good to know there are 2 ways to make portc5 not function
[12:15:52] <RikusW> megal0maniac: so how does it work now ?
[12:19:04] <megal0maniac> Range seems similar to my desktop router, so pretty well
[12:21:25] <RikusW> what was the range before mod ?
[12:25:15] <megal0maniac_afk> zlog
[12:25:53] <megal0maniac_afk> RikusW: I may have forgotten to test it :$
[12:26:01] <megal0maniac_afk> But it is definitely better
[12:33:59] <WormFood> fuckin' awesome! I got to meet Andrew "Bunnie" Huang tonight :D Cool Guy!
[12:34:05] <braincracker> o yea done
[12:34:08] <braincracker> :)
[12:36:06] <braincracker> i have extended portc using 2x 74hc595, they drive multiplexed 8 segment displays, if i insert update output latch in code, and slow it down, it looks like predator's led display effect
[12:59:41] <uv> good evening
[13:23:06] <braincracker> abcminiuser <= http://www.atmel.com/Images/doc8025.pdf
[13:23:26] <braincracker> 18.11.1 TCCR2A – Timer/Counter Control Register A << this is confucing
[13:23:30] <braincracker> s
[13:23:39] <braincracker> the WGM21 WGM20 things
[13:24:02] <braincracker> Table 18-8. Waveform Generation Mode Bit Description states WGM2 WGM1 WGM0
[13:24:21] <braincracker> Bits 1:0 – WGM21:0: Waveform Generation Mode
[14:21:18] <megal0maniac_afk> zlog
[15:19:27] <braincracker> can i set ctc mode on timer2 and set top to 128 while still having my timer2 overflow interrupt ?
[15:20:54] <braincracker> i was expecting OCRA to reset my timer2value and generate timer2 overflow interrupt at 2x rate
[15:21:16] <braincracker> (it does not work that way)
[15:21:46] <RikusW> did you set the mode right ?
[15:21:55] <braincracker> i guess yes
[15:22:21] <RikusW> iirc overflow should happen at the new TOP
[15:22:41] <braincracker> apparently it does not tick at 2x rate
[15:23:23] <RikusW> for that change the prescaler
[15:23:39] <braincracker> not an option, i have div/1
[15:23:48] <braincracker> wanted to use 128 as top value
[15:24:00] <RikusW> timer prescaler ?
[15:24:04] <braincracker> 1
[15:24:14] <RikusW> hmm
[15:24:17] <braincracker> no higher speed possible
[15:24:26] <RikusW> whats the avr clock ?
[15:24:31] <braincracker> 32768Hz
[15:25:32] <RikusW> so slow ?
[15:25:37] <RikusW> for low power ?
[15:25:44] <braincracker> ah wait i have typos
[15:25:57] <braincracker> TCCR2B &= ~((1<<CS21)|(1<<CS21)|(1<<WGM22));
[15:28:09] <RikusW> why use &= ?
[15:28:25] <RikusW> for the first time I always use =
[15:28:36] <RikusW> to ensure its in a known state
[15:31:28] <braincracker> ok, clk prescale by 1, WGM22 = 0; WGM21 = 1; WGM20 = 0; OCR2A = 128; fail
[15:36:12] <braincracker> it does nothing actually
[15:37:41] <RikusW> paste the line
[15:42:09] <braincracker> http://pastebin.com/ajH4i1TB
[15:42:14] <braincracker> here is the "line"
[15:42:42] <braincracker> (comments are outdated)
[15:45:17] <braincracker> abcminiuser <= this was the issue i was complaining about before
[15:45:49] <braincracker> now trying to isolate the problem
[15:59:35] <braincracker> or i should clear timer2 counter from ocr2a interrupt manually?
[15:59:49] <braincracker> instead of using timer2 overflow interrupt
[16:39:42] <braincracker> 256Hz updating 5 digits looks nice, no flickering
[16:55:03] <braincracker> hmm, this hing is more precise than my pc's clock ;/
[16:56:33] <Roklobsta> how do you know
[16:57:09] <braincracker> synced 3 times to time.nist.gov last 20 minutes on PC, and my atmega is still within 1 s...
[16:57:45] <Roklobsta> what xtal are you using?
[16:57:56] <braincracker> simple 32768Hz watch crystal
[16:58:29] <Roklobsta> maybe your pc has a cheapie 32000hz cloxk
[16:58:33] <braincracker> and pc uses tsc and the odd freq 1.193...MHz thing
[16:58:48] <Roklobsta> yes, tsc should be much better
[16:58:48] <braincracker> so it is faster a little
[16:58:53] <braincracker> no.
[16:58:58] <braincracker> tsc is off too
[16:59:05] <Roklobsta> does windows time servevice do anything like NTPd?
[16:59:17] <braincracker> you can calibrate error though it will not be stable
[16:59:22] <Roklobsta> or is it dumb as a plate of chicken?
[16:59:27] <braincracker> no idea
[16:59:34] <Tom_itx> that's why we have a NIST timebase to fix it
[16:59:36] <braincracker> i'm on linux with RT kernel
[17:00:01] <Roklobsta> OH
[17:00:13] <Roklobsta> see, my bias shone through right away
[17:00:27] <Roklobsta> run ntpd
[17:01:19] <Roklobsta> most distros have it going
[17:01:25] <Roklobsta> by most I mean ubuntu
[17:01:49] <braincracker> /etc/init.d/ntpdate start
[17:01:53] <braincracker> here is what i did
[17:02:03] <Roklobsta> i hope the NIST watch crystal is actually 32768Hz exactly.
[17:02:15] <braincracker> they use atomic clocks
[17:02:23] <braincracker> a little higher freq
[17:02:35] * Roklobsta watches another joke break the sound barrier over braincracker's head.
[17:02:36] <braincracker> measuring the period of C-133
[17:09:37] <braincracker> ctc mode does not work, but... test succeeded, 30 minutes, within +-0.5s, hacked it together
[17:15:02] <braincracker> could have used 1 second division using normal mode, but i wanted to drive the POV display routine out of timer2 too