Back
[02:06:55] <l9> when I do a echo "text" > /dev/ttyUSB0 shouldnt that show up on cat /dev/ttyUSB0?
[02:40:11] <KidBeta> so ive managed to write something in verilog that compiles and does something that I want yet it produces no gates and complains of dangling logic and ports. I think this means that the wire isnt driven by anything but im not 100% sure
[02:45:22] <KidBeta> pretty much im trying to see how many LUTs a 32bit AND/OR/NOT gate is going to take up
[02:52:43] <l9> is there anyone here that has an stk500 test board? do I need too wire anything too make the rs232 spare work?
[03:09:22] <ziph> KidBeta: Anything not attached to a pin gets optimised into non-existence.
[03:12:48] <ziph> KidBeta: (Specifically an output pin)
[03:13:21] <ziph> KidBeta: So even if you've hooked up the inputs you still need to output everything you're interested in.
[03:13:57] <ziph> KidBeta: If you just output a single bit of the 32-bit gate the optimiser will be a smart arse and only include the bits of your module that it needs to get the output result.
[03:22:37] <ziph> abcminiuser: 'ello.
[03:24:29] <abcminiuser> Heyo
[03:26:47] <ziph> Still answering silly questions for a few pounds of lutefisk a week? ;)
[03:29:53] <abcminiuser> Heh as always
[03:30:05] <abcminiuser> Bought a Nexus 4 yesterday, still setting it up
[03:30:15] <abcminiuser> Forgot how much crap I used on my Galaxy Nexus :(
[03:31:29] <ziph> Heh.
[03:31:46] <abcminiuser> Viking funeral for the other one today
[03:32:01] <abcminiuser> Lost its life after a brief love affair with the floor while I was doing support
[03:32:03] <Roklobsta> it'll dine with the other dead smartphones in Valhalla
[03:33:31] <ziph> abcminiuser: Ever played with USB on them?
[03:33:38] <abcminiuser> On what?
[03:33:49] <ziph> Android phones..
[03:33:49] <abcminiuser> I got a very basic Android Accessory working on the galaxy
[03:34:40] <ziph> Only problem with the host mode reversal trick it can do for older phones is the 500mA supply you need on your device. ;)
[03:34:49] <ziph> Although I think most of the new ones support device mode.
[04:57:04] <antto> can a bootloader overwrite itself (or corrupt itself in anyway) ?
[05:18:56] <ziph> antto: In general or specifically?
[05:19:29] <ziph> antto: In general it depends on how the bootloader is written.
[05:20:26] <ziph> antto: If you've got ROM based interrupt tables and no way to switch interrupt tables at runtime then it's very hard to write a bootloader that can't screw itself over.
[05:20:37] <antto> a bootloader on an atmega162
[05:20:55] <antto> given that it's located in the last 512 bytes of the flash memory
[05:21:08] <antto> but lockbits are 0x3F
[05:23:07] <antto> overwrite/corrupt itself, or anything else like change it's fuse settings or whatever else which can lead to it being unusable
[05:25:34] <OndraSter__> normally bootloaders are not capable of self updating
[05:25:35] <OndraSter__> the better ones are
[05:27:40] <antto> i mean is it technically possible for a bootloader to brick itself?
[05:27:58] <antto> i mean, aren't the last pages from the flash somewhat "special" ?
[06:24:37] <t4nk881> hey guys. i am desperately trying to get a timer0 interrupt to work with my atmega8. but neither in the atmel studio simulator nor with the real atmega the interrupt service routine gets called. can somebody look at this minimal code please?
http://pastebin.com/6cs7VUxZ
[06:29:31] <specing> Don't use pastebin.com
[06:29:39] <specing> also, it should work from what I see.
[06:30:24] <specing> put LEDs on all PORTB pins or turn them all ON at once
[06:30:59] <specing> maybe you made an off-by-one error when searching for the pin
[06:31:46] <l9> specing: why not pastebin.com???
[06:32:38] <t4nk881> specing: thanks for the reply at first :) the thing is, i already tried timer1 with COMPA and there the interrupt gets called and the corresponding led gets turned on..
[06:33:21] <t4nk881> specing: its just that the ovf_vect doesnt get called even from the simulator in contrast to the code for timer1
[06:33:43] <specing> l9: "pastebin.com is ad-supported, and mangles data by converting characters. even the raw version isn't the same as the original data. please use a sane pastebin, such as
http://pastebin.ca, https://gist.github.com, or
http://sprunge.us (''/msg greybot sprunge'' for usage)"
[06:34:13] <specing> I like sprunge because I can paste directly from my shell
[06:35:16] <KidBeta> ziph: thanks
[06:35:19] <KidBeta> i didnt have the output setup
[06:35:25] <specing> t4nk881: look at the disassembly for obvious errors
[06:35:26] <KidBeta> but i dont know what to set it up to ?
[06:35:39] <specing> t4nk881: maybe gcc made a mistake
[06:35:49] <specing> (though highly unlikely)
[06:36:58] <specing> t4nk881: also remove the cli() at the end, it is completely unnecessary
[06:37:44] <Roklobsta> t4nk881: This definerely works.
http://pastebin.com/EzSGgz1Q
[06:38:27] <Roklobsta> specing: gcc doesn't make mistakes. Only the meatpopsicle on the chair does.
[06:39:45] <Roklobsta> t4nk881: i have updated it a wee bit.
http://pastebin.com/0CdW1DtR
[06:39:59] <specing> Roklobsta: gcc makes mistakes
[06:40:11] <specing> atleast the AVR one does
[06:40:18] <Roklobsta> are you prepared to commit seppuku over it?
[06:40:34] <specing> Please stop using pastebin.com!
[06:40:40] <l9> specing: sprunge was genius :)
[06:40:57] <specing> Roklobsta: I have no idea what that is
[06:41:06] <Roklobsta> just say yes.
[06:41:33] <specing> No.
[06:41:42] <Roklobsta> but it's really honourable.
[06:48:54] <KidBeta> http://pastebin.com/USsW4sKq this is the code that isnt syntethising anything, its probably all wrong
[06:50:36] <ziph> KidBeta: You cut it off after the most important bit, want to pastebin the entire module?
[06:50:51] <KidBeta> ziph: the entire module is hundreds and hundreds of lines
[06:50:54] <KidBeta> but sure
[06:51:14] <Roklobsta> wait why on #avr?
[06:51:14] <ziph> pastebin can hack it. ;)
[06:51:17] <t4nk881> roklobsta: thank you. is there any specific order how i should set the bits to init the timer?
[06:51:20] <Roklobsta> unless you made a verilog avr core
[06:51:23] <ziph> Paste it private and expiring
[06:51:28] <ziph> if you're paranoid. ;)
[06:51:43] <KidBeta> its a prebuilt module for the DE-0 Nano from terasic
[06:51:53] <Roklobsta> t4nk881: no i suppose not. just make sure they are all set before you start interrupts
[06:51:57] <Roklobsta> with sei()
[06:52:08] <KidBeta> http://pastebin.com/vYcM4p2M
[06:52:23] <t4nk881> so i can start the timer with setting tccr0 and then set timsk?
[06:52:52] <KidBeta> http://pastebin.com/22NqWUXi this is it actually
[06:53:15] <Roklobsta> i don't know. i haven't tried. just start with copying my code as much as what is suiable to timer0
[06:53:56] <t4nk881> okay i will :) thanks all for your help :)
[06:54:15] <Roklobsta> TIMERTICKS is here:
[06:54:18] <Roklobsta> // Number of ticks/interrupts per second
[06:54:19] <Roklobsta> #define TICKS 100
[06:54:19] <Roklobsta> #define TIMERTICKS (CLOCKSPEED/8/TICKS)
[06:54:47] <Roklobsta> CLOCKSPEED is in hertz
[06:55:12] <Roklobsta> in my case it's #define CLOCKSPEED 11059200
[06:56:02] <ziph> KidBeta: Wire up GPIO_0_D to your 32 bits of input and GPIO_1_D to your 32 bits of output
[06:56:20] <KidBeta> ziph: hm
[06:56:24] <KidBeta> but I have 3 inputs
[06:56:36] <ziph> 3x 32 bit inputs?
[06:57:03] <KidBeta> yes
[06:57:30] <ziph> In that case write a 96 bit shift register using two input pins and then feed each 32 bit slice of the shift register to your inputs. :)
[06:58:52] <ziph> Or you could use the the high 2 bits to clock in each 32 bit value
[06:59:17] <KidBeta> could I use
[06:59:23] <KidBeta> GPIO for 2
[06:59:33] <KidBeta> then GPIO_1 | GPIO_2 for the last
[07:01:47] <ziph> You can do anything as long as the optimiser is fooled in to thinking the inputs can take on any value and aren't related to each other.
[07:02:11] <KidBeta> :D
[07:02:21] <KidBeta> last time i tried to use GND
[07:02:23] <KidBeta> GPIO*
[07:02:27] <KidBeta> it said they were tied to GND
[07:02:57] <ziph> e.g. if you build an "or" module that has inputs "A" and "B" and does "A or B", then outside the module you do A = 1 all the time, the optimser will eliminate the module and replace it with a "1". :)
[07:03:07] <ziph> Yeah, they do whole-of-fpga optimisation.
[07:03:18] <Roklobsta> damnit, why doesn't avrstuidio work on openbsd? i don't want the NSA stealing my code!
[07:03:23] <ziph> So anything you hardcode will result in it simplifying all of the logic downstream.
[07:03:42] <ziph> What makes you think the NSA isn't the biggest contributor to the Linux kernel?
[07:04:12] <ziph> (OpenBSD rather)
[07:04:55] <Roklobsta> oh and all their steganographic backdoors they plant into the kernel? Looks like a serial driver but no, it's a flippin' piece of code to track your movements using wifi reflections.
[07:05:16] <ziph> Yeah.
[07:05:23] <specing> lol @ Roklobsta
[07:05:24] <KidBeta> ziph: hmm
[07:05:25] <KidBeta> lemme check
[07:05:28] <ziph> I mean, the BSD development teams are fairly opaque. ;)
[07:06:09] <Roklobsta> that's true. OpenSSH my arse. Should be OpenyoursoultousSSH
[07:06:24] <specing> It is *Open* SSH
[07:06:28] <specing> :D
[07:06:37] <Roklobsta> yeah.
[07:06:49] <Roklobsta> damnit, i think my tinfoil hat has a hole in it
[07:06:56] <Roklobsta> BRB, need to make a new one
[07:08:29] <Roklobsta> I heard Matt Dillon's dad's mum's neighbour's cat's vacation feeder's dog walker walks the dog of the NSA director.
[07:09:34] <Roklobsta> i just hope the uarts on my 1280 aren't backdoored.
[07:10:12] <twnqx> of course they, transmitting straight to an NSA LEO satellite
[07:10:38] <Roklobsta> every time you push the stack the NSA get an update on what you had for brekkie.
[07:11:51] <KidBeta> ziph: still getting 0 gaes :/
[07:12:10] <KidBeta> gates*
[07:14:38] <KidBeta> twnqx: they actually use a HEO satellite ;P
[07:15:04] <twnqx> oh.
[07:15:20] <twnqx> didn't think you could reach them from simple ICs.
[07:15:30] <KidBeta> you can
[07:15:38] <ziph> KidBeta: Pastebin it?
[07:15:43] <KidBeta> HEO passes at points like LEO and then goes out further to transmit
[07:16:00] <KidBeta> ziph: would it be optimising it all away? , I changed them to 1 bit for now just to try and get it to work
[07:16:33] <ziph> KidBeta: Yeah, if it knows two inputs to an and/or are actually the same it will optimise it away.
[07:16:49] <KidBeta> i changed the gates to 1 bit but they have different inputs
[07:16:53] <ziph> e.g. myreg | myreg goes to myreg
[07:17:14] <ziph> Should be fine then.
[07:17:54] <KidBeta> http://pastebin.com/WE1CN8bb
[07:19:38] <ziph> Oh, you also shouldn't be using = the way you are
[07:20:01] <KidBeta> need <= ?
[07:20:18] <ziph> Yes
[07:20:29] <ziph> = should almost never be used in synthesisable verilog
[07:20:34] <ziph> Also you still aren't setting any outputs
[07:20:37] <KidBeta> (C programmer)
[07:21:17] <twnqx> ziph: you mean when assigning to register :P
[07:22:24] <ziph> KidBeta: You need to find a good tutorial specifically on synthesisable Verilog then, otherwise you'll have a pretty rough time.
[07:22:34] <KidBeta> yeah figured as much
[07:22:43] <KidBeta> know any good books
[07:24:28] <KidBeta> thanks mate :) finally working
[07:24:57] <ziph> I don't know a good intro one
[07:25:06] <KidBeta> ill see what my uni uses
[07:25:46] <ziph> But once you've got the basics mastered you really, really should read this one:
http://books.google.com.au/books/about/Advanced_FPGA_Design.html?id=k9T-Q8RgEHcC&redir_esc=y
[07:26:20] <ziph> Plus the Altera docs and app notes are very, very good.
[07:27:09] <ziph> You need to figure out how to look at the RTL diagrams in whatever software you're using, because when you start they will be the biggest help in figuring out what you've done wrong.
[07:27:48] <ziph> (They're the ones that show you modules in the form of logic gates and flip flops; if you're looking at LAB's you've gone too low ;) )
[07:31:12] <KidBeta> yeah
[07:31:15] <KidBeta> im good with gates
[07:31:18] <KidBeta> flip flops not so much
[07:35:14] <ziph> FF's in RTL are simple, they're basically just an input, a clock, clock enable, and possibly a set and reset input.
[07:35:48] <ziph> When you're starting out you should do _everything_ on a single clock.
[07:36:18] <KidBeta> yeah
[07:36:22] <ziph> Even if you're sampling 100 baud SPI, you still use the master clock.
[07:36:26] <KidBeta> so pretty much flip flops are data i think ?
[07:37:01] <ziph> Yeah, a FF outputs whatever the input was on the last clock edge where the clock enable was active.
[07:37:33] <ziph> FPGA's (and logic in general) is just flipflops with logic gates in between.
[07:37:43] <ziph> FF - logic - FF - logic ...
[07:39:22] <ziph> And since all your FF's work off the same clock the maximum speed is limited by the slowest block of logic between any two FF's.
[07:39:55] <ziph> The documentation/appnotes on your FPGA tool timing analyser should go through all that.
[07:41:50] <KidBeta> yeah
[07:53:46] <l9> UDR=sprintf(buffer, "%d \r", seconds); shouldnt that give a human readable output of the int too usart?
[07:57:13] <braincracker> h
[08:18:37] <KidBeta> ziph: they can synth the for loops okay yeah?
[08:18:48] <KidBeta> ive just got a lot less less gates used then i expected
[08:19:03] <ziph> KidBeta: Yes but only in certain circumstances.
[08:19:15] <KidBeta> it has a definite bound
[08:19:25] <KidBeta> i < 64; i = i + 1
[08:21:10] <KidBeta> 56 LE's for what is essentially when the loops unrolled
[08:21:20] <KidBeta> around I dunno, 3/400 logic ops
[08:21:47] <ziph> Keep in mind that an LE usually has a LUT of N ~= 4 inputs to 1 output.
[08:22:17] <KidBeta> but each op is 32bits wide
[08:24:11] <KidBeta> hmm
[08:24:14] <KidBeta> i think i know why
[08:24:26] <ziph> You can have 4x32 inputs going to 1x32 outputs and it'll still take up 32 LE's.
[08:24:51] <KidBeta> yeah
[08:25:33] <KidBeta> something is up still the LE count is far too low
[08:25:52] <KidBeta> 400 32x32 -> 32 ops should takeup more then 64 LE's
[08:31:12] <KidBeta> i really wish i could turn the optimisations off
[08:41:39] <KidBeta> 400
[08:41:40] <KidBeta> thats more like it
[08:54:53] <ziph> l9: UDR is a single byte register
[08:54:59] <ziph> l9: You can't give it a string like that
[08:58:08] <l9> ziph: i kinda understood that when i was only getting jibbersih up on the screen. but i cant find any good way send a interger too the usart so that i can read it in a terminal
[08:59:07] <ziph> l9: You assign a byte into the UART send register and then you have to wait for it to finish sending it.
[09:03:32] <l9> hmm... then i need too break the string up into tiny pieces too send one and one char
[09:03:56] <ziph> Yeap.
[09:04:03] <KidBeta> ziph: thanks for the help and recommendations btw :)
[09:04:30] <ziph> KidBeta: No problem, hope you get into it, it makes a nice change from CPU programming. ;)
[09:04:35] <KidBeta> indeed
[09:04:47] <KidBeta> my plan was actually to make a CPU I could then program with it :P
[09:05:07] <ziph> If you want to start small you can get CPU's already and add peripherals to them.
[09:05:19] <ziph> There's a really good MSP430 core for instance.
[09:05:23] <ziph> Works with MSPGCC. :)
[09:05:49] <KidBeta> yeah
[09:05:53] <KidBeta> but i wanna do everything :)
[09:06:00] <KidBeta> CPU, VGA, PS2, Serial is the end game
[09:06:20] <ziph> The CPU is a fair bit nastier than the peripherals.
[09:06:27] <ziph> (If you want an efficient one)
[09:06:51] <ziph> If you don't do pipelining you end up with a CPU that takes 3-4 cycles to do a single instruction.
[09:06:54] <ziph> AKA a PIC. ;)
[09:07:01] <KidBeta> hmm yeah
[09:07:09] <KidBeta> couldnt you just clock it slow as well :P
[11:08:24] <Horologium> isn't there a clock identical AVR core out there too?
[11:24:54] <ziph> Must be newish if there is.
[11:37:16] <Horologium> I thought I heard about one a couple of years ago.
[11:37:45] <Horologium> http://opencores.org/project,avr_core
[11:38:05] <Horologium> http://opencores.org/project,avr_hp
[11:38:53] <Horologium> http://opencores.org/project,pavr
[11:39:10] <Horologium> http://opencores.org/project,avr8 this one looks interesting...an avr subset for cpld.
[11:40:00] <Horologium> pAVR looks most complete.
[11:41:33] <Horologium> so, no, they are not newish.
[12:13:35] <Badaboom> yawn
[13:33:41] <Xark> ziph: This PDF goes over how to create an CPU core (using AVR as an example) for an FPGA in VHDL ->
http://opencores.org/project,mcpu (browse SVN and look in trunk/doc or trunk/html)
[18:48:41] <MarkX> hey
[19:08:43] <MarkX> quick basic question, i see #define being used a lot. is there an advantage of that over something like "static volatile uint8_t x"
[19:08:43] <MarkX> ?
[19:15:50] <antto> i'd say.. depends on the value
[19:16:14] <Tom_itx> define isn't a variable
[19:16:24] <Tom_itx> it's a preprocessor directive
[19:16:26] <antto> #define pi (atan(1.0)*4.0)
[19:16:38] <antto> static const double pi = (atan(1.0)*4.0);
[19:16:48] <antto> in this case, the define is overkill ;]
[19:18:51] <MarkX> hmm
[19:18:53] <MarkX> good points
[19:19:36] <MarkX> i was thinking it had something to do with memory saving
[19:19:51] <antto> just remember that the defined "pi" will be replaced with (atan(1.0)*4.0) _everywhere_ it occures
[19:21:20] <Roklobsta> ew
[19:21:33] <Roklobsta> that's a whole lot of floaty nastuness
[19:23:40] <MarkX> antto: so it would do that calculation everytime i use pi?
[19:24:42] <antto> depends how smart the compiler is
[19:25:03] <antto> the more important thing is, that this happens _before_ the compiler
[19:25:24] <antto> the preprocessor will replace all occurances of "pi" with the actual piece of text there
[19:26:01] <antto> so the compiler will not know about "pi" or that you're using this same thing N times in various places (unless it analyzes for such things and optimizes)
[19:26:10] <antto> and i wouldn't count on that ;]
[19:26:33] <antto> the compiler doesn't see any #defines
[19:26:44] <MarkX> ooh
[19:26:46] <MarkX> interesting
[19:26:57] <antto> at least that's my understanding of how it works
[19:27:04] <MarkX> makes sense
[19:27:06] <antto> someone correct me if i'm wrong ;]
[19:27:25] <Roklobsta> why not just use the pi define in math.h
[19:27:43] <antto> Roklobsta forget pi, it was an example
[19:27:49] <Roklobsta> ok, e
[19:27:50] <MarkX> (total side note: 40 year old virgin on tv, the censorship takes the goodness out of the movie)
[19:28:09] <Roklobsta> is this free to air in the usa?
[19:28:46] <MarkX> ?
[20:45:14] <braincracker> h
[20:46:12] <Horologium> q
[20:46:48] <braincracker> what's up Horologium ? prepared for ww3 ?
[20:48:03] <Roklobsta> has anyone use the SPI interrupt for handling SPI or do you just use busy loops?
[20:48:18] <Horologium> of course..have been prepared for it for many years.
[20:48:27] <Horologium> have my rayban sunglasses.
[20:49:55] <Horologium> nukes start to fall and I will put on the sunglasses and sit on the roof and watch the pretty fireworks.
[20:50:03] <Badaboom> lol
[20:50:18] <Horologium> and, assuming I survive, I have a stick and two stones so I'm prepared for ww4
[20:55:26] <braincracker> :)
[20:55:42] <braincracker> they say don't hide behind a tank because it will melt on you
[20:56:14] <Roklobsta> has anyone use the SPI interrupt for handling SPI or do you just use busy loops?
[20:56:41] <Tom_itx> i don't remember
[20:57:12] <Tom_itx> but i think i used busy
[20:57:13] <braincracker> Roklobsta <= an interrupt is always good
[20:59:01] <Roklobsta> i have an spi based memory card and SPI flash memory on the bus.
[20:59:05] <Horologium> Roklobsta, I'm sure someone has or they wouldn't keep making them.
[20:59:23] <Horologium> you need chip select lines to select the different devices.
[20:59:29] <Roklobsta> yes
[20:59:34] <Roklobsta> it's all there.
[21:00:41] <Roklobsta> i am just wondering ... i have a little rtos i have made. uarts on irq are terrific so now my attention is on SPI and i2c next. just thinking about the best way to make a nonblocking abstraction to them
[21:02:37] <Roklobsta> i guess an msdos filesystem is on the cards for the spi memory
[21:03:06] <Roklobsta> what's a good dos/fat32 library for avr?
[21:03:27] <Horologium> there are several out there.
[21:03:37] <Badaboom> I want to start using this microsd as well
[21:04:13] <Roklobsta> the freertos one? or something else
[21:04:23] <Roklobsta> and I want lwip too
[21:04:28] <Roklobsta> eventually
[21:04:36] <Horologium> want in one hand and piss in the other and see which gets wet first.
[21:04:57] <Badaboom> so piss on the sdcard?
[21:09:02] <Roklobsta> http://elm-chan.org/fsw/ff/00index_e.html
[21:09:08] <Roklobsta> updated last week
[21:13:24] <Roklobsta> i think i'll use irqs
[21:15:00] <Badaboom> f disk..wow i havent used fdisk in a while
[21:16:42] <Kevin`_> there's a common linux utility for mbr partitions called fdisk that's current. I would hope anyone using 'fdisk' now is using that
[21:23:42] <Roklobsta> http://www.mikrocontroller.net/articles/AVR_FAT32 seems far simpler
[21:23:52] <Roklobsta> elm-chans is bloaty
[21:25:18] <Horologium> last one I used was part of the procyon avrlib
[22:04:58] <Roklobsta> i just want one that is as simple as it needs to be and is reliable