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[00:20:00] <ambro718> ok got to go to bed now ;) if you wish to play with it pull the git and compile with F_CPU=16000000 MCU=atmega2560 ./compile.sh
[00:22:36] <timemage> ambro718, going to have to do it tomorrow. i did try the last file. got no difference. then just to sanity check i programmed it with a serial print loop. though, i didn't add the delay in setup(). so i'v semi-bricked it. tomorrow i'll fix it and try your code again.
[00:24:02] <ambro718> okay see u :)
[00:42:29] <beaky> hello
[00:42:36] <beaky> when should I use jtag over isp
[00:42:40] <beaky> for programming an avr
[06:37:53] <RikusW> http://semiaccurate.com/2013/06/23/lsi-puts-out-a-4tb-pcie3-ssd/
[07:09:38] <Tom_itx> $29 k
[07:15:00] <RikusW> thats the problem...
[09:20:50] <ambro718> perfect, even gdb crashes while I'm trying to debug my program with simavr
[09:21:30] <ambro718> simavr segfaults too
[09:33:43] <specing> ambro718: Hahahaha
[09:34:50] <ambro718> I'm surprised the AVR itself doesn't catch fire...
[09:35:26] <ambro718> although since I'm working on a live 3D printer something like that could certainly happen
[09:43:29] <Frigolit> ambro718: you've created a monster!!
[10:01:38] <timemage> ambro718, i may be able to look at it again in a bit.
[10:01:57] <ambro718> that would be great, it's driving me insane lol
[10:02:55] <ambro718> it's interesting how debugging tools are most likely to fail when your program has bugs
[10:55:46] <timemage> ambro718, pulled latest, compiled, getting: "Try... ; Crashing now... ; Survived! ; Try... ; Crashing now... ; HELLO" repeating. the semicolon bit being my doing.
[10:56:08] <ambro718> timemage: exactly
[10:56:14] <timemage> ambro718, ok. just making sure.
[10:56:48] <ambro718> it fails to return from send_stepper_command() in driver/AxisController.h
[10:56:55] <ambro718> instead it resets to main
[10:58:25] <antto> how do you debug.. a bootloader ;]
[10:58:53] <antto> is there some mechanism to send strings to avrdude so it prints them to screen?
[10:58:59] <timemage> ambro718, yeah. i'm just confirming behaviour.
[10:59:46] <timemage> ambro718, you said is does/doesn't do this based on -Os ?
[10:59:56] <ambro718> it doesn't do it at -Os
[11:00:29] <timemage> ambro718, and when you're not using -Os you're just not supplying an optimization option at all?
[11:00:53] <ambro718> timemage: I was using -O4 and -O2
[11:01:21] <timemage> ambro718, both work?
[11:02:03] <ambro718> yes that's how I remember it
[12:02:21] <timemage> ambro718, i hope you're benefiting from these templates a lot =)
[12:02:58] <ambro718> timemage: heh, I think I am ;)
[12:03:10] <ambro718> I'm currently trying to reduce the problem
[12:03:54] <timemage> ambro718, i'm adding a line that has nothing to do with templatng, and i'm getting piles of template error.
[12:04:22] <ambro718> timemage: paste it, I got experience
[12:04:53] <timemage> ambro718, well, i know it has something to do with my use of AMBRO_ASSERT. i'm just going to put a normal printf in there.
[12:05:36] <ambro718> if you're trying to printf a FixedPoint or BoundedInt you need .value() or .bitsValue(), respectively
[12:05:49] <ambro718> *reverse-respectively
[12:06:41] <timemage> just trying to print a string.
[12:08:12] <timemage> well, if you have a hex file you want me to test, let me know. problems are just compounding here. it would take me days to come up to speed on it.
[12:12:22] <ambro718> well I've managed to reduce it a lot so far
[12:12:37] <ambro718> but I'm still reducing it more
[13:17:21] <ambro718> but I'm still reducing it more
[13:17:34] <ambro718> * sry accidental enter hit
[13:26:51] <megal0maniac_afk> zlog
[13:35:56] <megal0maniac> Intel has lost their shit
[13:36:43] <megal0maniac> A board which has been out for nearly 2 years, if not more, and these are some bugfixes from the last 2 months:
[13:36:47] <megal0maniac> Fixed issue where SATA3 ports are unstable for operating system
[13:36:50] <megal0maniac> installation.
[13:36:53] <megal0maniac> Fixed issue where USB ports randomly fail.
[13:37:04] <megal0maniac> Fixed issue where USB 3.0 does not work.
[13:37:11] <megal0maniac> . Fixed issue where SATA port 2 does not detect devices.
[13:37:33] <Tom_itx> minor
[13:37:55] <megal0maniac> I disagree
[13:38:03] <megal0maniac> SATA ports should just work
[13:38:13] <Tom_itx> i was kidding
[13:38:40] <megal0maniac> I've been back and forth to the suppliers with a "faulty motherboard" like 8 times. I'm on my second one
[13:39:24] <megal0maniac> In the BIOS, it shows "not connected" on SATA port 2, but then it boots from the drive connected to that port
[13:39:51] <megal0maniac> I don't really want to sell Intel boards to clients anymore
[13:40:27] <braincracker> try asrock
[13:40:46] <braincracker> msi
[13:40:46] <megal0maniac> I thought they were low cost boards?
[13:40:56] <braincracker> yes but sata works on them
[13:40:57] <megal0maniac> ASUS was what I had in mind
[13:40:58] <braincracker> m,,
[13:41:03] <megal0maniac> :P
[13:42:00] <megal0maniac> I've got an intel DH61SA board lying in the cupboard. It has exactly the same PCB as my DH61BE, but with practically all of the features removed.
[13:42:31] <braincracker> happens
[13:42:33] <megal0maniac> You can see that there's a place for 4 more SATA ports, and a PCIe x16 port to be soldered, but they've been left out
[13:42:57] <megal0maniac> It upsets me
[13:42:59] <braincracker> $2 :P
[13:43:08] <braincracker> transistors, connectors are expensive
[13:44:55] <megal0maniac> I know it's the cheapest way to do it, but still. So much potential :)
[13:45:47] <megal0maniac> Like different CPUs being exactly the same, with the cheaper one having features turned off. Same silicon, cheaper to make
[14:01:12] <vectory> when one is cheaper to make, then it cannot be exactly the same, eh?
[14:01:53] <vectory> maybe same amount of silicon, but not same functionality ;)
[14:01:59] <braincracker> but it may be better
[14:02:02] <braincracker> less bloat
[14:24:36] <OndraSter> <megal0maniac> Like different CPUs being exactly the same, with the cheaper one having features turned off. Same silicon, cheaper to make
[14:24:43] <OndraSter> same sillicon, the more expensive costs the same as the cheap one
[14:24:52] <OndraSter> but they might have got half of the cache bad
[14:24:56] <OndraSter> or one core damaged etc
[14:25:17] <OndraSter> so they just disable them during the testing phase and sell it as a slower/simpler CPU
[14:28:08] <megal0maniac> I know, of course. But it's depressing to have a product, knowing that it's really much better than what it seems, but stuff has been turned off
[14:28:23] <megal0maniac> It makes business sense to do it that way but meh.
[14:28:35] <jadew> the best place where this happens is in oscilloscope
[14:28:35] <braincracker> wrong
[14:28:41] <jadew> and it's the best, because they usually get hacked
[14:28:56] <jadew> and we can enjoy the higher specs that they were built at
[14:29:01] <braincracker> 99.9999999% pure silicone die is not cheap, larger chip is more expensive
[14:29:40] <jadew> braincracker, the point was for exactly the same chip, but repurposed because of x factors
[14:29:49] <megal0maniac> braincracker: You
[14:29:52] <jadew> like the MCP2xxx series
[14:30:02] <megal0maniac> braincracker: You're also splitting up R&D costs, testing etc
[14:30:14] <jadew> they're just PIC chips with custom firmware sold as usb2usart, 2i2c, 2etc
[14:30:23] <jadew> and they're cheapper!
[14:30:35] <jadew> most likely because they didn't pass QA as OndraSter said
[14:31:11] <braincracker> yeah they make PICs at home in the kitchen near the rice-fields after harvest
[14:31:14] <megal0maniac> My 15mhz scope is definitely running at its full potential. And isn't hackable :P
[14:31:47] <jadew> I don't know where they make it, but there's no other reason why they'd be cheapper
[14:32:03] <jadew> megal0maniac, time to upgrade :P
[14:32:55] <megal0maniac> I have an Saleae for now. Scope is good enough for most things analogue :)
[14:33:23] <jadew> I'm really eyeballing the new rigol scope, but I'm waiting for the new generation with built in wave gen
[14:33:31] <jadew> so I can buy the current one at a lower price
[14:34:58] <ambro718> ok so gcc hates me obviously... has anyone played around with avr-llvm?
[14:38:18] <Roklobsta> is there such a thing?
[14:38:24] <Roklobsta> and whydoes gcc hate you
[14:40:20] <jadew> gcc hates everyone
[14:40:55] <ambro718> Roklobsta: looks like a compiler bug which I can't reduce to anything readable
[14:41:19] <braincracker> user error, replace user and press any key to continue...
[14:41:26] <jadew> haha
[14:41:27] <Roklobsta> so far gcc has been very kind to me. all issues thus far are PEBKAC realted
[14:41:43] <cyber377> hi everybody
[14:41:54] <braincracker> yo cyber377 what's up ?
[14:42:03] <cyber377> i am french guy who try to use a NRF24L01 with a ATTINY 2313
[14:42:23] <cyber377> When i try to send something by SPI it always return me FF ..
[14:43:50] <jadew> is there a question in there? or you just want to see if other nationalities are getting different results?
[14:44:16] <cyber377> http://pastebin.com/DGxxAnAc here is my code,
[14:44:18] <Roklobsta> is that FF in french or english?
[14:44:25] <cyber377> 0xFF
[14:44:27] <cyber377> :D
[14:44:34] <OndraSter> :)
[14:44:57] <cyber377> first i would like to know if someone have already used that NRF24L01 module
[14:45:14] <cyber377> Did we have a frequency to comunicate with ? (min max)
[14:45:38] <Roklobsta> I heard that the L'Académie française want to make a French programming language.
[14:46:28] <twnqx> i wonder about how much you know about spi... do you do the dummy-write to read?
[14:46:37] <Roklobsta> if you are getting 0xFF back maybe the communications on SPI aren't working.
[14:46:56] <Roklobsta> is there an ID register you can try to read?
[14:47:09] <cyber377> "STATUS"
[14:47:12] <cyber377> 0x07
[14:47:39] <Roklobsta> if you can read the ID register correctly (or something you know will give you a value other than FF) then you are getting somewhere.
[14:47:43] <cyber377> he is defined in the .h file : #define STATUS 0x07
[14:48:16] <cyber377> i am getting 0xFF maybe SPI connexion is not working,
[14:48:39] <cyber377> I cant verify if my module is working i have nothing for make tests at home.
[14:50:03] <jadew> are you using example code?
[14:51:16] <jadew> from the datasheet it says that you can write a 0 and get the status register as a result
[14:51:41] <jadew> wait
[14:51:43] <jadew> you write FF
[14:51:45] <Roklobsta> you need a cro. maybe the SPI enable bit on the device isn't selected?
[14:51:46] <jadew> you get status
[14:52:07] <cyber377> i am doing the exemple in the website but modified.
[14:52:10] <Roklobsta> be sure your MISO/MOSI are the correct way around
[14:52:52] <cyber377> miso is plugged on miso
[14:52:56] <cyber377> mosi on mosi
[14:53:09] <cyber377> you said i have to write a 0 first?
[14:53:15] <jadew> nono
[14:53:19] <jadew> write a FF
[14:53:24] <jadew> and it should return the status register
[14:53:33] <cyber377> where did you see that ?
[14:53:47] <jadew> in the datasheet
[14:53:53] <jadew> NOP is FF
[14:54:04] <jadew> and the status register is being shifted out on each command
[14:55:30] <cyber377> hum
[14:55:30] <jadew> is the sample code written for attiny2313?
[14:55:39] <cyber377> no
[14:56:18] <jadew> so how are you operating the spi bus? your own library?
[14:56:20] <Roklobsta> is the CSN pin forced low when you are using the SPI?
[14:56:44] <Roklobsta> have a look at page 47 of the nordic data sheet
[14:57:08] <cyber377> yes CSN is at 0
[14:57:18] <cyber377> that is done
[14:57:26] <jadew> cyber, you're setting it back to 1 when you're done using the SPI?
[14:57:26] <Roklobsta> do you have aCRO?
[14:57:46] <Roklobsta> jadew once tried to do everything without a cro.
[14:57:50] <cyber377> jadew no
[14:58:09] <jadew> cyber377, do that, set it low when you start sending, high when you're done
[14:58:14] <cyber377> he is at 1 when i dont use SPI
[14:58:16] <cyber377> and 0
[14:58:19] <jadew> ah, ok
[14:58:21] <cyber377> when i try to comunicate
[14:58:31] <cyber377> is that not good ?
[14:58:33] <jadew> so the "no" was for "your own library?", right?
[14:58:39] <jadew> cyber377 yes
[14:58:55] <cyber377> no ?
[14:59:02] <cyber377> i don't understand the question
[14:59:07] <jadew> Roklobsta, btw, because you suggested me to get a scope is probably why I'm still in the hobby :)
[14:59:12] <cyber377> but aout the 0xFF
[14:59:15] <jadew> cyber377, did you write the SPI library?
[14:59:23] <jadew> the one you're using on the attiny?
[14:59:49] <cyber377> in my exemple he do that : WriteByteSPI(R_REGISTER + reg); then wait 10us reg = WriteByteSPI(NOP);
[15:00:00] <cyber377> he write the 0xFF afther
[15:00:04] <cyber377> after*
[15:00:13] <cyber377> damn my english :D
[15:00:19] <jadew> please answer my question first
[15:00:40] <cyber377> hum i don't use spi library,
[15:00:49] <jadew> so you wrote the spi code yourself?
[15:00:55] <jadew> the initialization and the sending part?
[15:01:05] <jadew> the code that actually shifts bits out
[15:01:06] <cyber377> #include "MonUsart.h" is myself code for USART and is working (i do the datasheet code)
[15:01:24] <cyber377> include "nRF24L01.h" is just a file with registers values
[15:01:35] <cyber377> exempe "STATUS -> 0x07
[15:01:53] <jadew> ah, I just checked the pastebin thing
[15:01:56] <Roklobsta> going by the register map on page 53 make sure you can read the config register 0x00 as 0x80. That way you know your SPI is OK.
[15:02:10] <cyber377> in the tiny2313A datasheet i don't see a SPI exemple IN C language (asm)
[15:02:40] <jadew> cyber377, there are more SPI modes
[15:02:46] <jadew> it's possible you're not using the right one
[15:02:56] <jadew> http://eenoob.com/home/post?id=4
[15:03:09] <Roklobsta> SPI can be tricky as there are several ways to congigure it. If you don't have the clock edge or endiannes right you are screwed.
[15:03:10] <jadew> from the datasheet it looks like that chip is using mode 0
[15:03:21] <jadew> so you have to send data using mode 0
[15:05:03] <cyber377> in the Datasheet i don't have exemples
[15:05:04] <cyber377> damn
[15:05:11] <jadew> you do
[15:05:15] <jadew> the timing section
[15:05:23] <jadew> it shows the mode of operation
[15:06:07] <ambro718> ok so my crash is triggered by -ftree-vectorize and -fno-tree-vectorize fixes it
[15:06:23] <ambro718> timemage: ^^ I was wrong about -O2, -O2 works but -O4 and -O4 don't
[15:07:23] <jadew> cyber377, you can try my SPI library for attiny2313:
http://eenoob.com/home/post?id=5
[15:07:29] <jadew> make sure you configure it for mode 0
[15:07:40] <jadew> I know for a fact that it works so at least you have that
[15:07:42] <Roklobsta> vectorize on AVR? Does it have an MMX mode I don't know about?
[15:08:10] <ambro718> Roklobsta: seems odd indeed. Only thing I can think of is movw
[15:08:22] <cyber377> jadew i will try with your library
[15:09:07] <Roklobsta> I have only used -O1 and I am fairyly happy so far with the quality of code it spits out. It's debuggable and seems pretty optimal.
[15:10:01] <ambro718> it depends on how fast you need it to be ;)
[15:10:54] <twnqx> just drop a 100mhz crystal on it.
[15:11:00] <Roklobsta> and some LiNi.
[15:11:25] <Roklobsta> really, atmel should shrink the die and ramp up the clock speed
[15:11:39] <Roklobsta> 100MHz AVR woudl be bitchin'
[15:12:00] <twnqx> yum, 4ghz 8bit cpu
[15:12:30] <Roklobsta> silabs have a 100MHz 8051 so why not avr?
[15:12:37] <twnqx> manufactured in 22nm tech!
[15:12:55] <twnqx> if you want a 100mhz avr.... just take an fpga?
[15:12:58] <jadew> then we'd all have to buy $50k scopes to debug our hobby projects
[15:13:11] <twnqx> uhhh
[15:13:20] <Roklobsta> yeah but not for the same power budget
[15:13:31] <Roklobsta> jadew: no just hack your rigol
[15:13:35] <jadew> haha
[15:13:39] <twnqx> i don't think so, you could run the clock via a DLL
[15:13:50] <twnqx> and make it up/down in 1mhz steps :P
[15:14:23] <Roklobsta> really, all the I/O still would work at rigol speeds. just the internals which you never see would be at 100MHz
[15:14:48] <jadew> ah, deffinitely
[15:14:49] <Roklobsta> the issue is that the flash may not work at 100mhz and a cache wuld be needed to stop pipeline stalls
[15:15:07] <twnqx> at 64kB... yeah, not too difficult.
[15:15:24] <Roklobsta> the silabs parts has a cache to keep the 8051 fed.
[15:15:26] * twnqx eyes 8MB cache on his i7
[15:15:37] <Roklobsta> i only have 6MB on my i7
[15:15:40] <cyber377> ok it always return FF
[15:15:45] <cyber377> with your library
[15:15:59] <jadew> cyber377, configured for mode 0?
[15:16:10] <cyber377> oh but
[15:16:14] <twnqx> do you pull the enable pin for the module to 0?
[15:16:27] <cyber377> i don't tch uint8_t ret = spi_io(0x8a); spi_io(0x55);
[15:16:34] <cyber377> i need to put 0x07 :D
[15:16:54] <cyber377> what is for the 0x55 ? did we have to put 0xFF here ?
[15:17:16] <jadew> it's just an example code
[15:17:29] <jadew> generates this pattern:
http://eenoob.com/download/usi/2313-usi-spi_example.png
[15:18:10] <jadew> you would just say uint8_t ret = spi_io(0xFF);
[15:18:18] <jadew> and you should have the status register in ret
[15:18:33] <jadew> or try to send the ID command
[15:20:10] <cyber377> ret = spi_io(0x07);
[15:20:31] <cyber377> but no i receive 0xFF (i have to send 0x07 for get status reg)
[15:20:44] <cyber377> is not my clock the problem ?
[15:21:17] * Roklobsta 's AVR project is turning into a monster.
[15:21:42] <ambro718> what is it?
[15:22:13] <Roklobsta> i started with a multitasking kernel and now it's growing a proper filesystem with device drivers.
[15:22:25] <ambro718> heh cool, is it open source?
[15:22:25] <jadew> cyber377, I don't know where you got that 0x07 from
[15:22:28] <jadew> did you read the datasheet?
[15:22:44] <Roklobsta> ambro718: lordy, not yet.
[15:22:51] <Roklobsta> maybe one day
[15:23:10] <cyber377> jadew from here :
http://gizmosnack.blogspot.fr/2013/04/tutorial-nrf24l01-and-avr.html
[15:23:14] <cyber377> in the fie
[15:23:15] <cyber377> wait
[15:23:33] <cyber377> https://github.com/maniacbug/RF24/blob/master/nRF24L01.h
[15:23:47] <Roklobsta> I'd like to make it a nice AVR specific system with all the I/O abstracted with device drivers.
[15:23:47] <cyber377> in that file
[15:24:17] <jadew> what makes you think that's a command?
[15:24:44] <Roklobsta> not a compromise like freertos and others make to be all things to all cpus which never works well
[15:25:57] <cyber377> he say's : Since the bites in the STATUS (0x07) register are preset to 0b00001110 (or 0x0E) you can test if this is true by this function:
[15:26:25] <jadew> why don't you read the datasheet instead?
[15:26:46] <cyber377> i think that the man do is working.
[15:27:24] <jadew> now, just by taking a look at the datasheet I know that what you're doing is only half ok
[15:27:26] <cyber377> i am downloading datasheet
[15:27:43] <Roklobsta> LOL doesn't have the data sheet
[15:28:04] <jadew> you have to read more bytes after you give the command
[15:32:59] <cyber377> is more difficul to use that than a 433Mhz module damn it !
[15:35:14] <cyber377> Oh my god : NOP 1111 1111 0 No Operation. Might be used to read the STATUS register
[15:35:19] <cyber377> You must send FF
[15:35:26] <cyber377> for get status register
[15:35:36] <jadew> doh, what was I saying all this time?
[15:35:37] <cyber377> not 0x07 >.<
[15:35:46] <cyber377> my god
[15:36:09] <jadew> you can probably read it with 07 too, if the status' register's address is at 7
[15:36:19] <jadew> because if you send a 5 bit address you can read whatever is there
[15:36:41] <jadew> anyway, keep reading :P I have to get back to work
[15:39:34] <cyber377> now i receive
[15:39:36] <cyber377> but
[15:40:28] <cyber377> 0xFF 0xFF 0x00 0xFF 0xFF
[15:40:30] <cyber377> damn
[15:42:25] <inkjetunito> 0x57 0x54 0x46
[15:42:38] <cyber377> ?
[15:43:41] <Roklobsta> if you define say a counter as int will gcc work out to make it a 16 or 8 bit value depending on the range?
[15:44:24] <Roklobsta> like if it's used to count to 5 and 5 is immutable.
[15:44:41] <Roklobsta> like for(i=0;i<5;i++)
[15:45:20] <timemage> ambro718, that sounds more like it. i'm curious to know what you do get if you try something like -O3 -fno-strict-aliasing
[15:46:26] <cyber377> ?
[15:47:17] <ambro718> timemage: actually, I've found that making a *trivial* change even after -fno-tree-vectorize still breaks it. The change is basically the manner of initialization; if, in my function, instead of "X res; res.member = y; return res;", I use C++ aggregate initialization "return X{y};", it breaks again, lol.
[15:48:34] <ambro718> it's the perfect heisen-bug, lol
[15:50:07] <timemage> ambro718, i was going to to suggest breaking your code up into a pile of translation units and applying separate optimization options to each. you have so much inline stuff that i'm not sure you'd get much out of that.
[15:51:15] <ambro718> it's because of the templates, and it gives the compiler oppurtunity to optimize and inline
[15:51:25] <ambro718> but apparently it gives it the oppurtunity to fuck up as well
[15:52:31] <timemage> ambro718, i used to be fairly decent at c+?. but i haven't used it much in a long time.
[15:52:57] <ambro718> timemage: my code is really just C+templates
[15:54:28] <ambro718> -fno-strict-aliasing doesn't fix it
[15:54:41] <ambro718> even though it could be the cause, due to my offsetof-style hacks
[15:54:43] <timemage> ambro718, i dunno. i found templates more trouble than they're worth most of the time. anyway, you've also got newer constructs in your code. at least newer than the original standard.
[15:54:45] <ambro718> which are not standard
[15:55:03] <timemage> ambro718, yup.
[15:55:58] <timemage> ambro718, you applied -fno-strict-aliasing after your -O3 yeah?
[15:56:24] <ambro718> sure
[15:58:53] <ambro718> ok my avr-clang is built now, time to get familiar with even more compiler bugs
[16:01:26] <cyber377> my problem is always here :s
[16:01:47] <cyber377> If i see page 51 of nordic datasheet (nrf24l01+)
[16:01:53] <timemage> ambro718, heh, i was kind of thinking you might write a pile of mocks or something like that and recompile this for a pc. maybe run valgrind on it. i've used that sort of technique before.
[16:02:29] <ambro718> I might, but it's also likely the bug is specific to the avr backend
[16:02:32] <cyber377> when i do STATUS (0xFF i receive some times 0x00 sometimes 0xFF
[16:03:40] <Roklobsta> you need a cro
[16:03:50] <Roklobsta> so you can understand what's going on.l
[16:03:52] <timemage> ambro718, yeah. although if it is some sort of weirdness to do with violating language constraints, it may carry over.
[16:04:33] <Roklobsta> ambro718: good luck. you are on a special Road to Compiler Hell.
[16:05:02] <ambro718> though I think the offsetof hacks happend only after the crash, for callbacks
[16:05:46] <ambro718> I've reduced the problem a lot, but the presence of the FixedPoint class seems essential
[16:06:10] <ambro718> basically I need to do a very specific series of computations with FixedPoint to trigger it
[16:19:21] <twnqx> since fixedpoint IS avr specific... report it to the mailing list?
[16:21:10] <ambro718> no, I do my own fixedpoint with integers
[16:21:47] <ambro718> I have atemplate class FixedPoint<int NumBits, bool Signed, int Exp>
[16:22:01] <ambro718> it keeps track of these 3 attributes through types
[16:22:51] <ambro718> FixedPoint<5,true,-4> a; FixedPoint<7,false,-2> b; auto c = a * b; // c is a FixedPoint<12, true, -6>
[16:31:28] <cyber377> i come again about my NRF24l01 i have read about the registers
[16:31:30] <cyber377> So
[16:31:46] <cyber377> I must send 0xFF at the adress 0x07
[16:32:57] <cyber377> and i must receive 0x0E or something llike 0xYE where Y depend
[16:33:31] <cyber377> When i send something by SPI i don't understand, sometimes i receive 0x00 sometimes 0xFF
[16:33:47] <cyber377> i am using jadew library
[16:35:01] <cyber377> https://www.sparkfun.com/datasheets/Components/SMD/nRF24L01Pluss_Preliminary_Product_Specification_v1_0.pdf
[17:50:49] <ambro718> has anyone tried using 64-bit operands with inline asm? Everytime I did, it didn't work.
[19:02:51] <jadew> I think I got spam with a virus from china
[19:03:10] <jadew> the subject line says: "KINDLY VIEW THE ATTACH TO OPEN MESSAGE"
[19:03:36] <antto> should be "kindly view the message to open the attach" ;P~
[19:04:05] <antto> so what was the attach? ;P~
[19:04:31] <jadew> I didn't open message in order to kindly view it
[19:04:51] <antto> you viewed it rudely?
[19:05:15] <jadew> yes, from a distance :P
[19:05:25] <antto> that's so.. rude
[19:05:42] <antto> y u no listen to chinese letters!
[19:17:27] <braincracker> http://www.youtube.com/watch?v=LvHMbN_epe4
[19:23:16] <braincracker> CIA party van
[20:25:01] <Tom_itx> braincracker, i kinda like the metal storm ones
[23:29:41] <Roklobsta> build -> Error 5 expected '=', ',', ';', 'asm' or '__attribute__' at end of input
[23:29:42] <Roklobsta> yay
[23:29:56] <Roklobsta> where is the missing punctuation?
[23:30:29] <Casper> hehe
[23:30:39] <Casper> use vim, and check the colors!
[23:31:27] <Roklobsta> foind it. a bloody '_' haning off the bottom of the source file just under a scroll bar
[23:31:37] <Roklobsta> stupid fat fingers.
[23:32:51] <Roklobsta> hmmm, i am doing some code ad nauseum for setting up 4 uarts. Does IO space allow for indirect addressing or is it all just in and out?
[23:34:53] <Roklobsta> i'd rather prefer to write the function once rather than copy it and replace things like UBRR0L with UBRR1/2/3L
