#linuxcnc-devel Logs

Jan 05 2023

01:00 AM linuxcnc-build: build #9565 of 0000.checkin is complete: Failure [4failed] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/9565 blamelist: CMorley <chrisinnanaimo@hotmail.com>
01:08 AM linuxcnc-build: build #7895 of 1404.rip-wheezy-rtpreempt-amd64 is complete: Failure [4failed garbage-collect git repo] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/1404.rip-wheezy-rtpreempt-amd64/builds/7895 blamelist: CMorley <chrisinnanaimo@hotmail.com>
05:06 AM linuxcnc-build: build #9566 of 0000.checkin is complete: Failure [4failed] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/9566 blamelist: CMorley <chrisinnanaimo@hotmail.com>
08:44 AM seb_kuzminsky: the wheezy-rtpreempt-amd64 build VM crashed, i rebooted it and restarted that build...
09:36 AM roguish[m]: good morning...
09:38 AM seb_kuzminsky: hey roguish[m]
09:58 AM pere: hi
10:01 AM seb_kuzminsky: good morning(?) pere :-)
10:18 AM pere: more after noon. :)
10:22 AM pere: seb_kuzminsky: btw, do you know how to move <URL: https://github.com/LinuxCNC/linuxcnc/pull/1422 > forward?
10:26 AM JT-Cave: seb_kuzminsky, looks like 2.8 broke sim.axis.remap.getting-started it works in 2.7.15 but has an error on loading in 2.8.4 both on Debian 9
10:31 AM seb_kuzminsky: JT-Cave: thanks for testing, that's a pretty big bisect but i'll look into it
10:36 AM seb_kuzminsky: pere: looks like the original author isn't very interested in pushing the PR forward, so someone else would have to do it. i don't have the cycles, though the hardware looks neat so i hope someone steps up
10:36 AM seb_kuzminsky: it's super cool that it's got open source firmware built by open source tools
10:37 AM JT-Cave: I'll look at 2.8.4 and see if I can figure out why there's an error on startup
10:37 AM seb_kuzminsky: JT-Cave: sweet
10:37 AM seb_kuzminsky: i just pushed a change to 2.9 to fix a small python2/3 syntax error in the remap code, maybe cherry-pick that back to 2.8 first
10:43 AM seb_kuzminsky: https://blog.yosyshq.com/p/colorlight-part-1/
10:44 AM pere: seb_kuzminsky: I accepted the python 3 pr already.
10:45 AM seb_kuzminsky: i saw that, thanks
10:53 AM seb_kuzminsky: dang that fpga board looks like a cool project....
10:54 AM CaptHindsight[m]: seb_kuzminsky: there are few of those boards that already work with LCNC, someone started a version that will use Mesa hm2eth
10:55 AM CaptHindsight[m]: https://github.com/sensille/litehm2
10:55 AM seb_kuzminsky: CaptHindsight[m]: i hope at least one of them makes a mergeable PR...
10:56 AM seb_kuzminsky: hacking on neat stuff is easy and fun, but making it usable by others is a chore
10:56 AM seb_kuzminsky: plus then you have to deal with users...
10:56 AM linuxcnc-build2: Worker `checkin` is missing. It was seen last on Thu Jan 5 08:56:16 2023.
10:57 AM seb_kuzminsky: litehm2 uses a spartan 6 so it's probably totally unavailable these days?
10:59 AM CaptHindsight[m]: looks like the Chinese LED co's stockpiled them
11:00 AM CaptHindsight[m]: https://www.amazon.com/Linsn-Receive-Card-RV901T-Controller/dp/B012JLZG10 but they are half that price on ali
11:00 AM seb_kuzminsky: am i missing something there? the litehm2 repo contains pcw's vhdl, is there an open source fpga toolchain that accepts vhdl these days? last time i checked (years ago) the yosys stack only handled verilog
11:01 AM CaptHindsight[m]: http://www.linsnled.com/rv901t-led-receiving-card.html
11:02 AM seb_kuzminsky: sweet, is has an optional smoke detector :-D
11:02 AM CaptHindsight[m]: To build the project, you need the following prerequisites:
11:02 AM CaptHindsight[m]: Litex (default setup)
11:02 AM CaptHindsight[m]: Risc-v toolchain
11:02 AM CaptHindsight[m]: Xilinx ISE 14.7
11:03 AM seb_kuzminsky: boo
11:03 AM seb_kuzminsky: what a buzzkill
11:04 AM seb_kuzminsky: has anyone reimplemented hm2 in verilog yet? how hard could that be??
11:04 AM CaptHindsight[m]: seb_kuzminsky: https://icestudio.io/ haven't tried this but many are using it
11:08 AM -!- #linuxcnc-devel mode set to +v by ChanServ
11:12 AM JT-Cave: this is the error I get with both 2.8.0 and 2.8.4 https://gnipsel.com/images/emc/Screenshot%20at%202023-01-05%2011-01-57.png
11:15 AM seb_kuzminsky: that's the error i saw too
11:15 AM JT-Cave: if equal(self.speed,0.0):
11:15 AM seb_kuzminsky: i bet it's someting about the multi-spindle stuff that went into 2.8
11:15 AM JT-Cave: equal is not a python function and I don't see it declared in python.py
11:16 AM JT-Cave: should be def equal(): or similar
11:21 AM seb_kuzminsky: i think it's from the `interpreter` python module, imported by stdglue.py, implemented in src/emc/rs274ngc/interpmodule.cc
11:22 AM JT-Cave: ah ok
11:24 AM seb_kuzminsky: i dont at all know how the remap python stuff fits together
11:25 AM JT-Cave: me either, even the remap docs are confusing to me
11:25 AM seb_kuzminsky: yeah :-(
11:26 AM JT-Cave: gotta run
11:27 AM seb_kuzminsky: see ya
12:04 PM seb_kuzminsky: the `emccanon` and `interpreter` "python modules" are, amazingly, built into the interpreter in Task, and only accessible to remap code, not to a normal external python interpreter
12:04 PM * seb_kuzminsky shakes his head sadly
12:15 PM Tom_L: i got that same 'if equal(self.speed,0.0) error as well
12:39 PM seb_kuzminsky: self.speed is a property of the `interpreter` module, defined here: https://github.com/LinuxCNC/linuxcnc/blob/master/src/emc/rs274ngc/interpmodule.cc#L953
12:40 PM seb_kuzminsky: properties can't take arguments
12:42 PM Tom_L: there are a couple files that go in the config directory for a remap: toplevel.py and remap.py and possibly a ngc file in the nc_files directory
12:42 PM Tom_L: you declare the remap in [RS274NGC]
12:42 PM Tom_L: REMAP=M6 modalgroup=6 prolog=change_prolog ngc=change epilog=change_epilog
12:43 PM Tom_L: and add the .py files to [PYTHON]
12:43 PM Tom_L: some are also found in the remap_lib folder
12:43 PM Tom_L: python_stdglue for one
12:43 PM seb_kuzminsky: this commit fixes the getter, but i dont yet know how to fix the setter: https://github.com/LinuxCNC/linuxcnc/commit/0ce8ffcaae902d8bf1ed5a3ccd1537340a865bfd
12:45 PM Tom_L: the remap code could be in remap.py or a .ngc subroutine file
12:46 PM Tom_L: in my case all remap.py had in it was: from stdglue import *
12:48 PM Tom_L: and the .ngc file had: M19 R0 P1 (spindle orient)
12:49 PM Tom_L: then an M6
12:49 PM Tom_L: funny you remap M6 and then can call it in the sub after doing other things
12:51 PM Tom_L: the remap line above indicates what ngc file to call
12:51 PM Tom_L: if any
01:09 PM roguish[m]: hey. is there some kind of ui design file for axis?
01:30 PM seb_kuzminsky: roguish[m]: not really, there's src/emc/usr_intf/axis/scripts/axis.py and share/axis/tcl/axis.tcl
01:38 PM roguish[m]: ah, thanks. did not know about the axis.tcl
01:43 PM roguish[m]: seb_kuzminsky: trying to figure out what the Tool Touch Off button does.....mathematically
01:45 PM seb_kuzminsky: since remap's spindle-speed property is currently broken (as shown by configs/sim/axis/remap/getting-started/demo.ini), i guess that means no one is using it
01:47 PM seb_kuzminsky: after playing with it for a bit i think it does not make sense to have a setter for the .speed property of the interpreter module - that's now how you set spindle speed
01:47 PM seb_kuzminsky: so i'm going to make a PR that turns it from a non-working read/write property to a working readonly property
01:48 PM seb_kuzminsky: if you want to modify spindle speed in remap, i think you have to remap the S word (not sure if that's currently possible)
01:48 PM roguish[m]: seb_kuzminsky: when is the code considered released? when, say 2.9, is formally release? then ? I'm having a discussion with morley in a forum post.
01:48 PM roguish[m]: not arguing with him, just discussing
01:48 PM pere: roguish[m]: "when it is done"?
01:48 PM seb_kuzminsky: when the Release Manager deems it ready to release
01:49 PM pere: and we can all help andypugh polish it. :)
01:49 PM pere: seb_kuzminsky: time for a upload of 2.9 into debian?
01:49 PM roguish[m]: so, the latest formal release is 2.8 ???
01:49 PM seb_kuzminsky: roguish[m]: that's right
01:50 PM seb_kuzminsky: pere: yeah, it's about time
01:50 PM roguish[m]: ok, just confirming.
01:50 PM roguish[m]: how is andyP doing with 2.9 ?
01:51 PM seb_kuzminsky: you'd have to ask him, but i have the impression he feels overworked
01:51 PM roguish[m]: no doubt
01:51 PM sensille: seb_kuzminsky: re rv901t. i did that stuff. i started with the spartan6 board, but it uses the litex framework which basically works on any platform. i already looked into building it for the colorlight board, using ghdl for verilog conversion. shouldn't be too much in the way
01:51 PM seb_kuzminsky: sensille: hi! very cool project :-)
01:52 PM sensille: heh, you said buzzkill :)
01:52 PM sensille: i'm aware of that. and I want users :)
01:52 PM seb_kuzminsky: well, i was thinking about open source fpga toolchain, and i was bummed to learn that it uses xilinx ise
01:53 PM sensille: it only needs very small changes to linuxcnc, it would be great to get them merged
01:53 PM sensille: mainly missing board identifications
01:53 PM sensille: and one change to the startup phase of the driver, collect all force_writes into one packet
01:54 PM sensille: but for example i can already use mesaflash to write main and fallback bitstreams :)
01:54 PM seb_kuzminsky: i'd welcome a PR (against 2.9 or master, depending on how invasive it is), hopefully including a bit of documentation so other people can replicate your setup and dev environment
01:54 PM pere: seb_kuzminsky: remember to ack <URL: https://bugs.debian.org/1023651 > in the next upload.
01:54 PM CaptHindsight[m]: seb_kuzminsky: one of the other areas like CAM where this is not much available for open tools
01:55 PM CaptHindsight[m]: plus the FPGA vendors don't want it open
01:56 PM pere: CaptHindsight[m]: I'm told FreeCAD Path is a useful free software CAM. Are there others? Are you using some free software CAM yourself?
01:57 PM seb_kuzminsky: CaptHindsight[m]: my understanding was the colorlight board is usable entirely with open source fpga tools
01:58 PM pere: seb_kuzminsky: mentioning yosys made me believe so to.
01:58 PM roguish[m]: pere: fusion 360, by Autodesk is free for 'hobbist' you have to be careful how to sign up for it. but it's pretty good.
01:58 PM pere: roguish[m]: the terms of use are not quite what I would consider 'free'.
01:59 PM seb_kuzminsky: FlatCAM is good for pcb trace isolation milling, and it's free as in speech
02:00 PM roguish[m]: that's what i mean you need to be careful. it's 'free' for hobby and non-commercial
02:00 PM seb_kuzminsky: roguish[m]: it's free as in zero-cost, but i don't think that's what pere means
02:01 PM CaptHindsight[m]: seb_kuzminsky: I lost track of what is that thread but I think you can just download his file that matches your wanted features and use a USB programmer to load it
02:01 PM CaptHindsight[m]: but if you want to change any features you have to go back to building the bitstream with Xilinx tools
02:02 PM CaptHindsight[m]: pere: Free/CAD path has some features working, same for BlendeCAM
02:02 PM CaptHindsight[m]: BlenderCAM
02:03 PM pere: roguish[m]: signing away ones rights to use a piece of software is hardly without cost. :)
02:03 PM roguish[m]: sliptronic, who is here occasionally, works on the cam in Freecad
02:04 PM CaptHindsight[m]: yeah he has been refactoring for a bit
02:04 PM roguish[m]: pere: yeah. I know what you mean..... read virtually every user agreement.....they are ugly.
02:04 PM CaptHindsight[m]: https://forum.linuxcnc.org/27-driver-boards/44422-colorcnc-colorlight-5a-75e-5a-75b-as-fpga-controller-board
02:04 PM CaptHindsight[m]: Replies:438
02:04 PM CaptHindsight[m]: Views:78.6k
02:05 PM CaptHindsight[m]: and only 1 year old
02:07 PM CaptHindsight[m]: https://github.com/enjoy-digital/litex
02:13 PM sensille: yes, you can build for the colorlight (lattice) board just with foss tools
02:15 PM seb_kuzminsky: sensille: got a link to your project?
02:15 PM sensille: https://github.com/sensille/litehm2
02:16 PM seb_kuzminsky: oh yeah, thanks
02:16 PM sensille: i hope the documentation is already good enough for anyone to replicate with the rv901t. porting to other boards is in progress
02:17 PM sensille: this is the driver patch: https://github.com/LinuxCNC/linuxcnc/compare/master...sensille:linuxcnc:litehm2-2.8.4
02:18 PM sensille: or would you want to also pull the firmware itself?
02:20 PM seb_kuzminsky: the firmware probably shouldn't be in the linuxcnc repo, but there should be docs in the linuxcnc repo somewhere with a link to the firmware (definitely source code & build instructions, and ideally also pre-built binaries)
02:21 PM sensille: ok
02:32 PM seb_kuzminsky: sensille: it looks like that linuxcnc patch makes all hm2_eth force write calls use the queue - have you tested how that works on mesa hardware?
02:36 PM sensille: no, i don't have access to any. i don't think it will cause trouble, but i can also try add an autodetect for litehm2 and only enable it then
02:36 PM sensille: or just add a parameter
02:36 PM seb_kuzminsky: if it can't be easily tested it'd probably be safer to not affect the behavior on other boards
02:37 PM sensille: yes
02:37 PM seb_kuzminsky: i see you added a `set_force_enqueue` function pointer to the llio struct, then then set it to the new `hm2_eth_set_force_enqueue` function for all boards
02:37 PM seb_kuzminsky: maybe you could leave it as NULL for all the mesa boards, and set it just for your new board?
02:38 PM CaptHindsight[m]: sensille: your instructions still mention installing the FPGA vendors tools
02:38 PM sensille: the board name should already be determined at that point, so yes
02:39 PM sensille: CaptHindsight[m]: yes, because the board has a spartan6. i don't think there is yosys support for that
02:39 PM sensille: rv901t != colorlight
02:40 PM CaptHindsight[m]: sensille: does flashrom support spartan6 now?
02:40 PM seb_kuzminsky: can your project target the colorlight too? or only the rv901t?
02:40 PM sensille: flashrom is for the onboard flash
02:40 PM CaptHindsight[m]: oh yeah, I'm probably conflating things :)
02:41 PM sensille: seb_kuzminsky: it can basically any board of the litex-boards: https://github.com/litex-hub/litex-boards#-boards-list
02:41 PM seb_kuzminsky: wow, cool!
02:41 PM seb_kuzminsky: on the colorlight board, does it run without xilinx ise, and using only open source tools?
02:42 PM seb_kuzminsky: (i'm clueless when it comes to fpga stuff, obviously...)
02:43 PM sensille: open source tools are only full available for lattice ice40 and ecp5. to my knowledge everything else is either experimental or unsupported
02:43 PM sensille: litex can also invoke vendor tools
02:43 PM sensille: so the colorlight board use lattice ecp5
02:43 PM sensille: -> yosys
02:44 PM seb_kuzminsky: that's great
02:44 PM sensille: the main obstacle in porting is probably the vhdl code, but i have hopes that ghdl can handle that
02:45 PM sensille: the vhdl doesn't use barely any xilinx-specific features, so that shouldn't be a problem
02:46 PM seb_kuzminsky: i'm looking at ghdl and i dont understand what it is - but it sounds like you're planning/hoping to use it to "compile vhdl into verilog", do i have that right?
02:47 PM sensille: it can do that, yes
02:47 PM sensille: or be used as a yosys plugin to translate vhdl into the yosys internal representation
02:48 PM seb_kuzminsky: this project is too cool 💖
02:53 PM seb_kuzminsky: it'd be so great to have linuxcnc support an entirely open source motion fpga system (including open source fpga bitfile tools)
02:53 PM CaptHindsight[m]: sensille: how much and where can you get rv901t's now?
02:53 PM pere: what can we do to make it so?
02:54 PM seb_kuzminsky: sounds like we should support sensille's effort to get their stuff merged, and then see what's needed to get it to run on the colorlight, using yosys
02:54 PM CaptHindsight[m]: https://www.aliexpress.us/item/3256802510729889.html $16.80
03:03 PM sensille: CaptHindsight[m]: it might be that availability of the rv901t is limited. i ordered a rv201t for testing, but is has an anlogic fpga
03:03 PM pere: sensille: so, what can we do to help?
03:04 PM seb_kuzminsky: have you tried it on the colorlight? why would one choose rv901t over colorlight?
03:07 PM CaptHindsight[m]: maybe availability vs spartan6
03:12 PM sensille: seb_kuzminsky: i have both, but rv901t was easier to modify for input/output. i also wanted to start with the lowest possible effort, so spartan. to have a working system helped immensely in understanding how it all works
03:12 PM seb_kuzminsky: there's lots of sellers for the colorlight 5A-75E and 5A-75B on ali and amazon, it seems to be plenty available
03:12 PM seb_kuzminsky: sensille: yeah, makes sense
03:13 PM sensille: my first focus was to replace the assembly-part with (risc-v) c code
03:14 PM seb_kuzminsky: is that the LBP part of the hostmot2 firmware? another thing i dont know much about...
03:15 PM seb_kuzminsky: do you have an opinion on the 5A-75B vs 5A-75E? i see the E version has a lot more I/O
03:18 PM CaptHindsight[m]: sensille: i only got as far as getting hm2 VHDL into Vitis for a Zynq board
03:18 PM CaptHindsight[m]: oh sorry meant Vivado
03:22 PM sensille: seb_kuzminsky: yes, lbp is the transport protocol and it is handle by the soft cpu in the mesa cards. i only have the 75b, but i should order the other version, too
03:26 PM sensille: CaptHindsight[m]: zynq could be interesting, too. let only the rt-threads run on the zynq cores?
03:31 PM CaptHindsight[m]: sensille: I recall latency on the first gen ZYNQ not being that great
03:32 PM sensille: pere: one thing i want to work on is better self-identification of the boards, like pin names etc. instead of hardcoding them on the host side
03:33 PM pere: sensille: what would that mean on the linuxcnc side?
03:34 PM CaptHindsight[m]: oh it's better than i recall https://www.jblopen.com/arm-cortex-a-interrupt-latency/
03:35 PM CaptHindsight[m]: https://www.jblopen.com/improving-interrupt-latency-on-the-cortex-a9/
10:21 PM linuxcnc-build: build #9570 of 0000.checkin is complete: Failure [4failed fetch branch to local git repo] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/0000.checkin/builds/9570 blamelist: Sebastian Kuzminsky <seb@highlab.com>
10:23 PM linuxcnc-build: build #6159 of 1510.rip-jessie-rtpreempt-i386 is complete: Failure [4failed configure-debian-control] Build details are at http://buildbot.linuxcnc.org/buildbot/builders/1510.rip-jessie-rtpreempt-i386/builds/6159 blamelist: Sebastian Kuzminsky <seb@highlab.com>